Board-dat/CCO/CCO3626-dat/CCO3626-dat.md
... ...
@@ -2,11 +2,17 @@
2 2
# CCO3626
3 3
4 4
5
-- [[CCO3626-dat]] - [[CCO3627-dat]] - [[CCO3628-dat]] - [[CCO3629-dat]] - [[DPR1016-dat]] - [[programmer-socket-dat]]
5
+- [[programmer-socket-dat]]
6 6
7
-https://www.electrodragon.com/product-category/modules/programmer/ic-socket-programmer/
8 7
9 8
9
+[IC Chip Socket Programmer SMD to DIP [Package]](https://www.electrodragon.com/product-category/modules/programmer/ic-socket-programmer/)
10
+
11
+- [[CCO3626-dat]] - [[SOP8-dat]]
12
+- [[CCO3627-dat]] - [[SSOP-dat]]
13
+- [[CCO3628-dat]] - [[PLCC-dat]]
14
+- [[CCO3629-dat]] - [[SOP8-dat]]
15
+- [[DPR1016-dat]]
10 16
11 17
- SOP8 150 mil = 3.9 mm
12 18
- supported chips:24CXX、93CXX
Board-dat/DPR/DPR1009-dat/dpr1009-dat.md
... ...
@@ -1,4 +1,4 @@
1
-# DPR1009 dat
1
+# DPR1009-dat
2 2
3 3
- [legacy wiki page](https://w.electrodragon.com/w/AVR_PROG_Shield)
4 4
- please refer for any missing info on legacy wiki
Board-dat/DPR/DPR1016-dat/DPR1016-dat.md
... ...
@@ -17,7 +17,7 @@ https://www.electrodragon.com/product-category/modules/programmer/ic-socket-prog
17 17
18 18
19 19
20
-- [[TQFP32-dat]] - [[TQFP-dat]] - [[footprint-dat]]
20
+- [[TQFP32-dat]] - [[TQFP-dat]] - [[PCB-footprint-dat]]
21 21
22 22
covert map
23 23
Chip-cn-dat/STC-dat/2025-07-15-12-34-22.png
... ...
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Chip-cn-dat/STC-dat/STC-SOP8-dat/STC-SOP8-dat.md
... ...
@@ -5,6 +5,9 @@
5 5
6 6
- [[STC-SOP8-dat]] - [[STC-dat]]
7 7
8
+- [[DIP8-dat]] - [[SOP8-dat]] - [[PCB-footprint-dat]] - [[PCB-dat]]
9
+
10
+
8 11
## STC8H / STC8G
9 12
10 13
STC8G1K17A
... ...
@@ -19,9 +22,15 @@ SOP8 - 8G1K08 - [[sensor-lidar-dat]]
19 22
20 23
[[serial-dat]] interface
21 24
25
+## pin definitions
22 26
23 27
![](2026-04-04-17-29-51.png)
24 28
29
+
30
+
31
+
32
+## board
33
+
25 34
![](2026-04-04-17-29-19.png)
26 35
27 36
## ref
Chip-cn-dat/STC-dat/STC-dat.md
... ...
@@ -26,14 +26,6 @@ STK12C68
26 26
27 27
28 28
29
-## programming
30
-
31
-![](2025-07-15-12-34-22.png)
32
-
33
-![](2026-05-06-18-53-04.png)
34
-
35
-
36
-
37 29
38 30
39 31
产品详情:
PCB-dat/PCB-design-dat/PCB-footprint-dat/DIP8-dat/2026-06-04-18-27-10.png
... ...
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PCB-dat/PCB-design-dat/PCB-footprint-dat/DIP8-dat/DIP8-dat.md
... ...
@@ -0,0 +1,14 @@
1
+
2
+
3
+# DIP8-dat
4
+
5
+## chip socket
6
+
7
+![](2026-06-04-18-27-10.png)
8
+
9
+![](2026-06-04-18-27-22.png)
10
+
11
+## programmer
12
+
13
+- [[DPR1093-dat]] - [[CH341-dat]] - [[programmer-dat]]
14
+
PCB-dat/PCB-design-dat/PCB-footprint-dat/PCB-footprint-dat.md
... ...
@@ -1,5 +1,12 @@
1 1
2
-# footprint-dat.md
2
+# PCB-footprint-dat.md
3
+
4
+
5
+
6
+- [[ISP-dat]] - [[PCB-footprint-dat]] - [[programmer-socket-dat]]
7
+
8
+- [[SDK-dat]] - [[STC-SDK-dat]]
9
+
3 10
4 11
- [[EDA-dat]]
5 12
... ...
@@ -7,7 +14,7 @@
7 14
8 15
- [[fab-PCBA-dat]]
9 16
10
-
17
+- [[DIP8-dat]] - [[SOP8-dat]] - [[PCB-footprint-dat]] - [[PCB-dat]]
11 18
12 19
## boards
13 20
... ...
@@ -20,7 +27,12 @@
20 27
21 28
## footprints
22 29
23
-- [[PLCC-dat]]
30
+- [[PLCC-dat]] - [[DIP8-dat]] - [[SOP8-dat]]
31
+
32
+- [[ISP-dat]] - [[PCB-footprint-dat]] - [[programmer-socket-dat]] - [[programmer-dat]]
33
+
34
+- [[TQFP-dat]] - [[PCB-footprint-dat]]
35
+
24 36
25 37
26 38
## pitch large footprint
PCB-dat/PCB-design-dat/PCB-footprint-dat/SOP8-150-dat/SOP8-150-dat.md
... ...
@@ -1,4 +0,0 @@
1
-
2
-# SOP8-150-dat
3
-
4
-- - width = 3.81 mm = 150 mil
... ...
\ No newline at end of file
PCB-dat/PCB-design-dat/PCB-footprint-dat/SOP8-200-dat/2024-08-29-01-56-56.png
... ...
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PCB-dat/PCB-design-dat/PCB-footprint-dat/SOP8-200-dat/SOP8-200-dat.md
... ...
@@ -1,6 +0,0 @@
1
-
2
-# SOP8-200-dat.md
3
-
4
-- width = 5.08 mm
5
-
6
-![](2024-08-29-01-56-56.png)
... ...
\ No newline at end of file
PCB-dat/PCB-design-dat/PCB-footprint-dat/SOP8-dat/2024-08-29-01-56-56.png
... ...
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PCB-dat/PCB-design-dat/PCB-footprint-dat/SOP8-dat/SOP8-dat.md
... ...
@@ -0,0 +1,22 @@
1
+
2
+
3
+# SOP8-dat
4
+
5
+- [[SOP8-dat]] - [[DIP8-dat]] - [[PCB-footprint-dat]]
6
+
7
+
8
+## SOP8-150-dat
9
+
10
+- - width = 3.81 mm = 150 mil
11
+
12
+
13
+## SOP8-200-dat.md
14
+
15
+- width = 5.08 mm
16
+
17
+![](2024-08-29-01-56-56.png)
18
+
19
+
20
+
21
+## ref
22
+
SDK-dat/ISP-dat/ISP-dat.md
... ...
@@ -1,6 +1,15 @@
1 1
2 2
# ISP-dat
3 3
4
+
5
+
6
+
7
+- [[ISP-dat]] - [[PCB-footprint-dat]] - [[programmer-socket-dat]]
8
+
9
+
10
+
11
+
12
+
4 13
in system programming
5 14
6 15
- [[programmer-socket-dat]] - [[ISP-dat]]
SDK-dat/KEIL-C51-dat/KEIL-C51-dat.md
... ...
@@ -5,6 +5,9 @@
5 5
- [[KEIL-C51-dat]] - [[MDK-ARM-dat]] - [[KEIL-C251-dat]]
6 6
7 7
8
+## supported boards
9
+
10
+- [[STC-dat]]
8 11
9 12
10 13
## version
SDK-dat/Programmer-dat/JLINK-dat/2024-07-05-17-55-07.png
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SDK-dat/Programmer-dat/JLINK-dat/JLINK-dat.md
... ...
@@ -0,0 +1,214 @@
1
+# JLINK dat
2
+
3
+
4
+- [[ARM-dat]]
5
+
6
+- [[DPR1135-dat]]
7
+
8
+
9
+JLink is a the SEGGER company launched JTAG emulator for ARM core chip to support simulation. IAR EWARM, ADS, KEIL, WINARM, RealView and other integrated development environment with the support all ARM7/ARM9 kernel chip simulation and seamless connectivity through the RDI interface and the integrated development environment, easy to operate, easy to connect, easy to learn, learning to develop ARM the best and most practical development tools.
10
+
11
+path
12
+- D:\Program Files\SEGGER\JLink\
13
+- C:\Program Files\SEGGER\JLink_V782
14
+
15
+
16
+
17
+
18
+## interface
19
+
20
+- [[JTAG-dat]] - [[SWD-dat]]
21
+
22
+![](2025-09-23-13-55-07.png)
23
+
24
+
25
+## driver installation
26
+
27
+
28
+https://www.segger.com/downloads/jlink/
29
+
30
+https://www.segger.com/downloads/jlink/JLink_Windows_V782_x86_64.exe
31
+
32
+2 applications found that can be updated to V7.82 of the J-Link software:
33
+- Ozone - The J-Link Debugger V328e (DLL V7. 86e in *c:\Program Files\SEccER\0zone*)
34
+- Keil MDK-ARM (DLL V7. 54d in *d: (Keil_v5\ARM\Segger*)
35
+
36
+
37
+- JLink_Windows_V754d_x86_64.exe
38
+
39
+after installation, tools are available for:
40
+
41
+![](2025-09-23-13-56-33.png)
42
+
43
+## add system path
44
+
45
+JLink.exe ==
46
+
47
+ C:\Users\Administrator>JLink.exe
48
+ SEGGER J-Link Commander V7.54d (Compiled Sep 28 2021 16:20:01)
49
+ DLL version V7.54d, compiled Sep 28 2021 16:18:43
50
+
51
+ Connecting to J-Link via USB...O.K.
52
+ Firmware: J-Link V9 compiled May 7 2021 16:26:12
53
+ Hardware version: V9.60
54
+ S/N: 69664564
55
+ License(s): RDI, GDB, FlashDL, FlashBP, JFlash
56
+ VTref=3.340V
57
+
58
+
59
+ Type "connect" to establish a target connection, '?' for help
60
+
61
+
62
+## config in MDK-ARM
63
+
64
+![](2025-09-23-14-12-14.png)
65
+
66
+## optional tools
67
+
68
+- [[jflash-dat]]
69
+
70
+### 1. J-Flash Lite (Programming Tool)
71
+First, connect the hardware: connect the SWD interface of the J-Link to the MCU's SWD interface (GND, SWCLK, SWDIO, VCC; VCC can be left unconnected).
72
+After installing the J-Link driver or Segger IDE, search for "J-Flash" in the Start menu and open it. If the connection is correct, the device type will usually be automatically recognized.
73
+
74
+Click OK to open the interface. After "Erase Chip" is done, browse for the hex or bin file to be programmed, then click "Program Device" and wait for completion.
75
+
76
+### 2. J-Flash SPI (Programming Tool)
77
+Use J-Link to program or read SPI Flash memory. The J-Link software includes a tool called JFlashSPI, which is used for programming and reading SPI memory.
78
+It is similar to J-Flash, but uses a different interface.
79
+
80
+**Steps:**
81
+1. Connect the SPI Flash chip:
82
+ Click Target -> Connect. If successful, connection information will be displayed at the bottom, including the Flash chip model, manufacturer, Flash ID, etc.
83
+2. Open the program file:
84
+ Click File -> Open data file to open the font library file to be programmed. Multiple file formats are supported. If you select a bin file (which has no start address), you need to manually enter the programming start address—just enter 0.
85
+3. Download:
86
+ Click Target -> Auto to download the program to the Flash chip. After completion, a success message will be shown at the bottom. The programming speed is quite fast; for example, a 170KB font file takes less than 1 second.
87
+4. Reading program files:
88
+ Like reading/writing MCU programs, reading SPI Flash chip programs is also supported.
89
+
90
+### 3. J-Flash (Programming Tool)
91
+Can be used to program, read, verify, and erase Flash.
92
+Same as above.
93
+J-Flash can also unlock chips.
94
+**Key step!** If the chip has read protection enabled, direct read/write will fail. For example, when using Keil, the chip model can be read, but programming always fails. Therefore, you must unlock the chip first, which takes about 10 seconds.
95
+
96
+### 4. J-Link Commander (Debugging Tool)
97
+J-Link can use commander commands to debug via the debug port and obtain real-time on-site data and debug information. This improves development efficiency, helps obtain on-site code data, and shortens bug locating time.
98
+
99
+**How to use J-Link Commander:**
100
+1. Connect J-Link to the device and install the appropriate driver.
101
+2. Open the J-Link Commander terminal.
102
+3. Enter the `connect` command.
103
+4. When prompted, enter `?`.
104
+5. The system will prompt you to select the target platform. For example, for the FR8018, select Cortex M3.
105
+6. Select the SWD interface and set the transfer speed.
106
+7. The interface will display that Cortex M3 has been detected, indicating a successful connection to the target board.
107
+8. Now you can use J-Link Commander commands for debugging.
108
+
109
+For commander commands, refer to the official SEGGER documentation:
110
+https://wiki.segger.com/J-Link_Commander
111
+
112
+**Common commands:**
113
+- `halt`: Stop execution. After stopping, the PC pointer, SP address, and other information will be displayed.
114
+- `go`: Run.
115
+- `mem` (mem8, mem16, mem32): Read memory address. Specify start address and length. Can be used with a map file to read variable values.
116
+- `write` (write1, write2, write4): Write to a specified address. Specify start address and length. Can be used with a map file to write variable values.
117
+
118
+The `halt` command can be used together with `go`. After executing `halt`, the device stops running and the current register values are displayed in the commander terminal. Pay special attention to the PC pointer, SP pointer, and R14 register values.
119
+
120
+
121
+
122
+## About J-Link
123
+
124
+
125
+* J-Link-OB developed by Segger, for development board "on-board"
126
+* Interface include JTAG and SWD, simple version only have SWD
127
+* Support IDE: J-Flash ARM、Keil MDK-ARM、IAR EWARM、CoIDE、mikroC PRO for ARM、nRFgo Studio
128
+* Supported MCUs: ST、Freecale、nuvoton、NXP、TI, Cypress, Atmel, Analog, Fujitsu, Toshiba, Energy Micro and more
129
+* Could be detected as fake in MDK, so not as good as STLINK or DAPLINK
130
+
131
+
132
+![](2024-07-05-17-55-07.png)
133
+
134
+![](2024-07-05-17-55-19.png)
135
+
136
+
137
+
138
+## supported MCUs
139
+
140
+- ARM7/9/11,
141
+- Cortex-A5/A7/A8/A9,
142
+- Cortex-M0/M1/M3/M4/M7,Cortex-R4,
143
+- Microchip PIC32
144
+- Renesas RX100/RX200/RX610/RX621/RX62N/RX62T/RX630/RX631/RX63N
145
+
146
+
147
+## usage
148
+
149
+![](2025-09-23-13-24-54.png)
150
+
151
+- VOUT is a 3.3V voltage output pin.
152
+- Users can remove the internal shorting jumper of the device to disable the 3.3V output.
153
+- VTREF is the internal voltage reference; this pin must be connected to
154
+
155
+
156
+### update
157
+
158
+![](2025-09-23-13-50-07.png)
159
+
160
+
161
+
162
+
163
+## BULK interface - wrong driver installed !!
164
+
165
+- [[usb-driver-dat]] - [[serial-dat]]
166
+
167
+![](2025-09-23-13-17-18.png)
168
+
169
+# What is a BULK Interface (USB)?
170
+
171
+A **BULK interface** is a type of **USB transfer mode** defined by the USB specification.
172
+It is used for **large, non-time-critical data transfers** between a USB device and a host.
173
+
174
+---
175
+
176
+## Key Points
177
+
178
+- **Purpose**: Moves large amounts of data reliably, without strict timing.
179
+- **Error Handling**: Each transfer is error-checked (CRC). If errors occur, the host retries.
180
+- **Speed**: Uses all available USB bandwidth that isn’t reserved for other transfers.
181
+- **Transfer Size**:
182
+ - USB 2.0 → up to **64 KB per transfer**, with max **512 bytes per packet** (High-Speed).
183
+ - USB 3.0 → larger packet sizes (up to **1024 bytes**).
184
+- **Scheduling**: Lowest priority compared to isochronous or interrupt transfers.
185
+ The host only sends bulk data when bus time is free.
186
+
187
+---
188
+
189
+## Examples of Devices Using BULK Transfers
190
+- **USB flash drives** (file transfers).
191
+- **Printers** (sending print jobs).
192
+- **Scanners** (image data).
193
+- **Custom devices** (MCU development boards, DA14585 debug/test interfaces, etc.).
194
+
195
+---
196
+
197
+## Comparison with Other USB Transfers
198
+
199
+| Transfer Type | Use Case | Priority | Guaranteed Bandwidth | Error Handling |
200
+|-----------------|------------------------------|----------|----------------------|----------------|
201
+| **Control** | Device configuration (setup) | Highest | Yes | Yes |
202
+| **Isochronous** | Audio/video streaming | High | Yes | No retry |
203
+| **Interrupt** | Small, quick signals (mouse) | Medium | Yes | Yes |
204
+| **Bulk** | Large, non-urgent data | Lowest | No | Yes |
205
+
206
+---
207
+
208
+👉 In short: A **BULK interface** is a **USB data channel** used for transferring large, reliable chunks of data when timing is not critical.
209
+
210
+
211
+
212
+## ref
213
+
214
+- [[SDK-dat]]
... ...
\ No newline at end of file
SDK-dat/Programmer-dat/jflash-dat/2025-09-23-18-32-44.png
... ...
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SDK-dat/Programmer-dat/jflash-dat/jflash-dat.md
... ...
@@ -0,0 +1,74 @@
1
+
2
+# jflash-dat
3
+
4
+
5
+
6
+![](2025-09-23-18-32-44.png)
7
+
8
+
9
+ Application log started
10
+ - J-Flash V7.54d (J-Flash compiled Sep 28 2021 16:19:07)
11
+ - JLinkARM.dll V7.54d (DLL compiled Sep 28 2021 16:18:43)
12
+ Reading flash device list [D:\Program Files\SEGGER\JLink\ETC/JFlash/Flash.csv] ...
13
+ - List of flash devices read successfully (451 Devices)
14
+ Reading MCU device list ...
15
+ - List of MCU devices read successfully (8788 Devices)
16
+ Opening project file [D:\HE\Desktop\da14858.jflash] ...
17
+ - Project opened successfully
18
+ Opening data file [E:\Git-category\git-ARM\MDK-ARM\DA14585\SDK_6.0.22.1401\DA145xx_SDK\6.0.22.1401\projects\added_apps\conn\simple_beacon\Keil_5\out_DA14585\Objects\simple_beacon_585.hex] ...
19
+ - Data file opened successfully (22708 bytes, 2 ranges, CRC of data = 0xC150CCE2, CRC of file = 0xEB7B2F68)
20
+
21
+connect to a [[DA14585-dat]]
22
+
23
+
24
+
25
+
26
+ Connecting ...
27
+ - Connecting via USB to probe/ programmer device 0
28
+ - Probe/ Programmer firmware: J-Link V9 compiled May 7 2021 16:26:12
29
+ - Device "DA14585" selected.
30
+ - Target interface speed: 4000 kHz (Fixed)
31
+ - VTarget = 3.340V
32
+ - Found SW-DP with ID 0x0BB11477
33
+ - DPIDR: 0x0BB11477
34
+ - Scanning AP map to find all available APs
35
+ - AP[1]: Stopped AP scan as end of AP map has been reached
36
+ - AP[0]: AHB-AP (IDR: 0x04770021)
37
+ - Iterating through AP map to find AHB-AP to use
38
+ - AP[0]: Core found
39
+ - AP[0]: AHB-AP ROM base: 0xE00FF000
40
+ - CPUID register: 0x410CC200. Implementer code: 0x41 (ARM)
41
+ - Found Cortex-M0 r0p0, Little endian.
42
+ - FPUnit: 4 code (BP) slots and 0 literal slots
43
+ - CoreSight components:
44
+ - ROMTbl[0] @ E00FF000
45
+ - [0][0]: E000E000 CID B105E00D PID 000BB008 SCS
46
+ - [0][1]: E0001000 CID B105E00D PID 000BB00A DWT
47
+ - [0][2]: E0002000 CID B105E00D PID 000BB00B FPB
48
+ - Executing init sequence ...
49
+ - Initialized successfully
50
+ - Target interface speed: 4000 kHz (Fixed)
51
+ - Found 1 JTAG device. Core ID: 0x0BB11477 (None)
52
+ - Connected successfully
53
+
54
+
55
+## NOTE
56
+
57
+Jlash for flash SPI flash only
58
+
59
+ ERROR: Could not find CFI compliant flash device
60
+ ERROR: Failed to check blank target
61
+ CFI = Common Flash Interface. JFlash tries to read the flash device ID via standard commands.
62
+
63
+It cannot detect the flash because either:
64
+
65
+There is no external flash at 0x00000000.
66
+
67
+The flash is connected via SPI, not a parallel memory interface, which JFlash expects.
68
+
69
+The chip expects programming through SWD using RAM/bootloader, not direct flash mapping.
70
+
71
+
72
+## ref
73
+
74
+- [[jlink-dat]]
... ...
\ No newline at end of file
SDK-dat/Programmer-dat/programmer-dat.md
... ...
@@ -0,0 +1,66 @@
1
+
2
+# programming-dat
3
+
4
+- [[JTAG-dat]] - [[JLINK-dat]]
5
+
6
+- [[ISP-dat]] - [[ICP-dat]]
7
+
8
+| Feature | ICP (In-Circuit Programming) | ISP (In-System Programming) |
9
+| -------------------------- | ----------------------------------------------------------- | -------------------------------------------------------------- |
10
+| **Full Name** | In-Circuit Programming | In-System Programming |
11
+| **Purpose** | Programs a microcontroller while it is still on the circuit | Programs a microcontroller without removing it from the system |
12
+| **Connection Requirement** | Requires access to programming pins on the circuit board | Uses standard communication interfaces (SPI, UART, etc.) |
13
+| **Typical Usage Stage** | Manufacturing/test stage | Field updates and development stage |
14
+| **System Power** | Often requires external programming power | Uses system power (target board can be powered) |
15
+| **Microcontroller State** | Can be programmed even if microcontroller is blank | Assumes microcontroller has a working bootloader or interface |
16
+| **Tools Used** | Dedicated programmer/debugger (e.g., JTAG, SWD) | On-board bootloader, or external programmer via standard I/O |
17
+| **Flexibility** | Less flexible for field upgrades | More flexible; supports firmware updates without disassembly |
18
+| **Hardware Complexity** | May require additional programming circuitry | Minimal extra hardware required |
19
+| **Examples** | Programming via JTAG or SWD interfaces | Programming via USB, UART, SPI using bootloader or firmware |
20
+
21
+- [[hex-dat]] - [[bin-dat]]
22
+
23
+## ICP-dat
24
+
25
+If ISP fails or UART is unavailable, consider using ICP via SWD with Nuvoton's Nu-Link debugger.
26
+
27
+
28
+
29
+
30
+## Target
31
+
32
+### ARM
33
+
34
+- [[JLINK-dat]]
35
+
36
+
37
+### AVR
38
+
39
+- [[AVR-dat]]
40
+
41
+- [[avrdude-dat]]
42
+
43
+- [[DPR1045-dat]] - [[DPR1009-dat]]
44
+
45
+- [[CCO3626-dat]] - [[CCO3627-dat]]
46
+
47
+
48
+### STC
49
+
50
+- [[STC-SDK-dat]]
51
+
52
+
53
+
54
+## programmer
55
+
56
+- [[SP200-dat]] - [[JLINK-dat]]
57
+
58
+- [[DPR1009-dat]]
59
+
60
+- [[DPR1093-dat]] - [[CH341-dat]] - [[programmer-dat]]
61
+
62
+
63
+
64
+## ref
65
+
66
+
SDK-dat/SP200-dat/SP200-dat.md
... ...
@@ -4,6 +4,8 @@
4 4
5 5
- [[ISP-dat]] - [[AVR-SDK-dat]]
6 6
7
+
8
+
7 9
legacy wiki page == https://www.electrodragon.com/w/SP200S%2B_USB_ISP_Programmer_(For_Microcontroller,_EEPROM,_ICs,_MCUs)
8 10
9 11
**Applications:** Supports programming of Atmel, Microchip, SST, ST, WINBOND series MCUs and EEPROMs (see the supported model list below).
SDK-dat/STC-SDK-dat/2025-07-15-12-34-22.png
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3 3
4 4
- [[STC-SOP8-dat]] - [[STC-dat]]
5 5
6
-- [[STC-SDK-dat]] - [[MDK-ARM-dat]]
7
-
6
+- [[STC-SDK-dat]] - [[MDK-ARM-dat]] - [[Keil-C51-dat]]
8 7
8
+- [[programmer-dat]]
9 9
10 10
11 11
## SDK
12 12
13
+
14
+### STC ISP programming software
15
+
16
+- (v6.96S) - https://www.stcmicro.com/rar/stc-isp6.96s.rar
17
+
18
+
19
+download from https://www.stcmicro.com/rjxz.html
20
+
13 21
STC ISP programming software (v6.95U)
14 22
15 23
install keil header files
16 24
17 25
![](2025-07-13-20-50-41.png)
18 26
19
-- [[Keil-C51-dat]]
27
+
28
+
29
+## programming
30
+
31
+![](2025-07-15-12-34-22.png)
32
+
33
+![](2026-05-06-18-53-04.png)
34
+
35
+
20 36
21 37
22 38
## repo
SDK-dat/programming-dat/Programmer-dat/JLINK-dat/2024-07-05-17-55-07.png
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... ...
@@ -1,214 +0,0 @@
1
-# JLINK dat
2
-
3
-
4
-- [[ARM-dat]]
5
-
6
-- [[DPR1135-dat]]
7
-
8
-
9
-JLink is a the SEGGER company launched JTAG emulator for ARM core chip to support simulation. IAR EWARM, ADS, KEIL, WINARM, RealView and other integrated development environment with the support all ARM7/ARM9 kernel chip simulation and seamless connectivity through the RDI interface and the integrated development environment, easy to operate, easy to connect, easy to learn, learning to develop ARM the best and most practical development tools.
10
-
11
-path
12
-- D:\Program Files\SEGGER\JLink\
13
-- C:\Program Files\SEGGER\JLink_V782
14
-
15
-
16
-
17
-
18
-## interface
19
-
20
-- [[JTAG-dat]] - [[SWD-dat]]
21
-
22
-![](2025-09-23-13-55-07.png)
23
-
24
-
25
-## driver installation
26
-
27
-
28
-https://www.segger.com/downloads/jlink/
29
-
30
-https://www.segger.com/downloads/jlink/JLink_Windows_V782_x86_64.exe
31
-
32
-2 applications found that can be updated to V7.82 of the J-Link software:
33
-- Ozone - The J-Link Debugger V328e (DLL V7. 86e in *c:\Program Files\SEccER\0zone*)
34
-- Keil MDK-ARM (DLL V7. 54d in *d: (Keil_v5\ARM\Segger*)
35
-
36
-
37
-- JLink_Windows_V754d_x86_64.exe
38
-
39
-after installation, tools are available for:
40
-
41
-![](2025-09-23-13-56-33.png)
42
-
43
-## add system path
44
-
45
-JLink.exe ==
46
-
47
- C:\Users\Administrator>JLink.exe
48
- SEGGER J-Link Commander V7.54d (Compiled Sep 28 2021 16:20:01)
49
- DLL version V7.54d, compiled Sep 28 2021 16:18:43
50
-
51
- Connecting to J-Link via USB...O.K.
52
- Firmware: J-Link V9 compiled May 7 2021 16:26:12
53
- Hardware version: V9.60
54
- S/N: 69664564
55
- License(s): RDI, GDB, FlashDL, FlashBP, JFlash
56
- VTref=3.340V
57
-
58
-
59
- Type "connect" to establish a target connection, '?' for help
60
-
61
-
62
-## config in MDK-ARM
63
-
64
-![](2025-09-23-14-12-14.png)
65
-
66
-## optional tools
67
-
68
-- [[jflash-dat]]
69
-
70
-### 1. J-Flash Lite (Programming Tool)
71
-First, connect the hardware: connect the SWD interface of the J-Link to the MCU's SWD interface (GND, SWCLK, SWDIO, VCC; VCC can be left unconnected).
72
-After installing the J-Link driver or Segger IDE, search for "J-Flash" in the Start menu and open it. If the connection is correct, the device type will usually be automatically recognized.
73
-
74
-Click OK to open the interface. After "Erase Chip" is done, browse for the hex or bin file to be programmed, then click "Program Device" and wait for completion.
75
-
76
-### 2. J-Flash SPI (Programming Tool)
77
-Use J-Link to program or read SPI Flash memory. The J-Link software includes a tool called JFlashSPI, which is used for programming and reading SPI memory.
78
-It is similar to J-Flash, but uses a different interface.
79
-
80
-**Steps:**
81
-1. Connect the SPI Flash chip:
82
- Click Target -> Connect. If successful, connection information will be displayed at the bottom, including the Flash chip model, manufacturer, Flash ID, etc.
83
-2. Open the program file:
84
- Click File -> Open data file to open the font library file to be programmed. Multiple file formats are supported. If you select a bin file (which has no start address), you need to manually enter the programming start address—just enter 0.
85
-3. Download:
86
- Click Target -> Auto to download the program to the Flash chip. After completion, a success message will be shown at the bottom. The programming speed is quite fast; for example, a 170KB font file takes less than 1 second.
87
-4. Reading program files:
88
- Like reading/writing MCU programs, reading SPI Flash chip programs is also supported.
89
-
90
-### 3. J-Flash (Programming Tool)
91
-Can be used to program, read, verify, and erase Flash.
92
-Same as above.
93
-J-Flash can also unlock chips.
94
-**Key step!** If the chip has read protection enabled, direct read/write will fail. For example, when using Keil, the chip model can be read, but programming always fails. Therefore, you must unlock the chip first, which takes about 10 seconds.
95
-
96
-### 4. J-Link Commander (Debugging Tool)
97
-J-Link can use commander commands to debug via the debug port and obtain real-time on-site data and debug information. This improves development efficiency, helps obtain on-site code data, and shortens bug locating time.
98
-
99
-**How to use J-Link Commander:**
100
-1. Connect J-Link to the device and install the appropriate driver.
101
-2. Open the J-Link Commander terminal.
102
-3. Enter the `connect` command.
103
-4. When prompted, enter `?`.
104
-5. The system will prompt you to select the target platform. For example, for the FR8018, select Cortex M3.
105
-6. Select the SWD interface and set the transfer speed.
106
-7. The interface will display that Cortex M3 has been detected, indicating a successful connection to the target board.
107
-8. Now you can use J-Link Commander commands for debugging.
108
-
109
-For commander commands, refer to the official SEGGER documentation:
110
-https://wiki.segger.com/J-Link_Commander
111
-
112
-**Common commands:**
113
-- `halt`: Stop execution. After stopping, the PC pointer, SP address, and other information will be displayed.
114
-- `go`: Run.
115
-- `mem` (mem8, mem16, mem32): Read memory address. Specify start address and length. Can be used with a map file to read variable values.
116
-- `write` (write1, write2, write4): Write to a specified address. Specify start address and length. Can be used with a map file to write variable values.
117
-
118
-The `halt` command can be used together with `go`. After executing `halt`, the device stops running and the current register values are displayed in the commander terminal. Pay special attention to the PC pointer, SP pointer, and R14 register values.
119
-
120
-
121
-
122
-## About J-Link
123
-
124
-
125
-* J-Link-OB developed by Segger, for development board "on-board"
126
-* Interface include JTAG and SWD, simple version only have SWD
127
-* Support IDE: J-Flash ARM、Keil MDK-ARM、IAR EWARM、CoIDE、mikroC PRO for ARM、nRFgo Studio
128
-* Supported MCUs: ST、Freecale、nuvoton、NXP、TI, Cypress, Atmel, Analog, Fujitsu, Toshiba, Energy Micro and more
129
-* Could be detected as fake in MDK, so not as good as STLINK or DAPLINK
130
-
131
-
132
-![](2024-07-05-17-55-07.png)
133
-
134
-![](2024-07-05-17-55-19.png)
135
-
136
-
137
-
138
-## supported MCUs
139
-
140
-- ARM7/9/11,
141
-- Cortex-A5/A7/A8/A9,
142
-- Cortex-M0/M1/M3/M4/M7,Cortex-R4,
143
-- Microchip PIC32
144
-- Renesas RX100/RX200/RX610/RX621/RX62N/RX62T/RX630/RX631/RX63N
145
-
146
-
147
-## usage
148
-
149
-![](2025-09-23-13-24-54.png)
150
-
151
-- VOUT is a 3.3V voltage output pin.
152
-- Users can remove the internal shorting jumper of the device to disable the 3.3V output.
153
-- VTREF is the internal voltage reference; this pin must be connected to
154
-
155
-
156
-### update
157
-
158
-![](2025-09-23-13-50-07.png)
159
-
160
-
161
-
162
-
163
-## BULK interface - wrong driver installed !!
164
-
165
-- [[usb-driver-dat]] - [[serial-dat]]
166
-
167
-![](2025-09-23-13-17-18.png)
168
-
169
-# What is a BULK Interface (USB)?
170
-
171
-A **BULK interface** is a type of **USB transfer mode** defined by the USB specification.
172
-It is used for **large, non-time-critical data transfers** between a USB device and a host.
173
-
174
----
175
-
176
-## Key Points
177
-
178
-- **Purpose**: Moves large amounts of data reliably, without strict timing.
179
-- **Error Handling**: Each transfer is error-checked (CRC). If errors occur, the host retries.
180
-- **Speed**: Uses all available USB bandwidth that isn’t reserved for other transfers.
181
-- **Transfer Size**:
182
- - USB 2.0 → up to **64 KB per transfer**, with max **512 bytes per packet** (High-Speed).
183
- - USB 3.0 → larger packet sizes (up to **1024 bytes**).
184
-- **Scheduling**: Lowest priority compared to isochronous or interrupt transfers.
185
- The host only sends bulk data when bus time is free.
186
-
187
----
188
-
189
-## Examples of Devices Using BULK Transfers
190
-- **USB flash drives** (file transfers).
191
-- **Printers** (sending print jobs).
192
-- **Scanners** (image data).
193
-- **Custom devices** (MCU development boards, DA14585 debug/test interfaces, etc.).
194
-
195
----
196
-
197
-## Comparison with Other USB Transfers
198
-
199
-| Transfer Type | Use Case | Priority | Guaranteed Bandwidth | Error Handling |
200
-|-----------------|------------------------------|----------|----------------------|----------------|
201
-| **Control** | Device configuration (setup) | Highest | Yes | Yes |
202
-| **Isochronous** | Audio/video streaming | High | Yes | No retry |
203
-| **Interrupt** | Small, quick signals (mouse) | Medium | Yes | Yes |
204
-| **Bulk** | Large, non-urgent data | Lowest | No | Yes |
205
-
206
----
207
-
208
-👉 In short: A **BULK interface** is a **USB data channel** used for transferring large, reliable chunks of data when timing is not critical.
209
-
210
-
211
-
212
-## ref
213
-
214
-- [[SDK-dat]]
... ...
\ No newline at end of file
SDK-dat/programming-dat/Programmer-dat/jflash-dat/2025-09-23-18-32-44.png
... ...
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SDK-dat/programming-dat/Programmer-dat/jflash-dat/jflash-dat.md
... ...
@@ -1,74 +0,0 @@
1
-
2
-# jflash-dat
3
-
4
-
5
-
6
-![](2025-09-23-18-32-44.png)
7
-
8
-
9
- Application log started
10
- - J-Flash V7.54d (J-Flash compiled Sep 28 2021 16:19:07)
11
- - JLinkARM.dll V7.54d (DLL compiled Sep 28 2021 16:18:43)
12
- Reading flash device list [D:\Program Files\SEGGER\JLink\ETC/JFlash/Flash.csv] ...
13
- - List of flash devices read successfully (451 Devices)
14
- Reading MCU device list ...
15
- - List of MCU devices read successfully (8788 Devices)
16
- Opening project file [D:\HE\Desktop\da14858.jflash] ...
17
- - Project opened successfully
18
- Opening data file [E:\Git-category\git-ARM\MDK-ARM\DA14585\SDK_6.0.22.1401\DA145xx_SDK\6.0.22.1401\projects\added_apps\conn\simple_beacon\Keil_5\out_DA14585\Objects\simple_beacon_585.hex] ...
19
- - Data file opened successfully (22708 bytes, 2 ranges, CRC of data = 0xC150CCE2, CRC of file = 0xEB7B2F68)
20
-
21
-connect to a [[DA14585-dat]]
22
-
23
-
24
-
25
-
26
- Connecting ...
27
- - Connecting via USB to probe/ programmer device 0
28
- - Probe/ Programmer firmware: J-Link V9 compiled May 7 2021 16:26:12
29
- - Device "DA14585" selected.
30
- - Target interface speed: 4000 kHz (Fixed)
31
- - VTarget = 3.340V
32
- - Found SW-DP with ID 0x0BB11477
33
- - DPIDR: 0x0BB11477
34
- - Scanning AP map to find all available APs
35
- - AP[1]: Stopped AP scan as end of AP map has been reached
36
- - AP[0]: AHB-AP (IDR: 0x04770021)
37
- - Iterating through AP map to find AHB-AP to use
38
- - AP[0]: Core found
39
- - AP[0]: AHB-AP ROM base: 0xE00FF000
40
- - CPUID register: 0x410CC200. Implementer code: 0x41 (ARM)
41
- - Found Cortex-M0 r0p0, Little endian.
42
- - FPUnit: 4 code (BP) slots and 0 literal slots
43
- - CoreSight components:
44
- - ROMTbl[0] @ E00FF000
45
- - [0][0]: E000E000 CID B105E00D PID 000BB008 SCS
46
- - [0][1]: E0001000 CID B105E00D PID 000BB00A DWT
47
- - [0][2]: E0002000 CID B105E00D PID 000BB00B FPB
48
- - Executing init sequence ...
49
- - Initialized successfully
50
- - Target interface speed: 4000 kHz (Fixed)
51
- - Found 1 JTAG device. Core ID: 0x0BB11477 (None)
52
- - Connected successfully
53
-
54
-
55
-## NOTE
56
-
57
-Jlash for flash SPI flash only
58
-
59
- ERROR: Could not find CFI compliant flash device
60
- ERROR: Failed to check blank target
61
- CFI = Common Flash Interface. JFlash tries to read the flash device ID via standard commands.
62
-
63
-It cannot detect the flash because either:
64
-
65
-There is no external flash at 0x00000000.
66
-
67
-The flash is connected via SPI, not a parallel memory interface, which JFlash expects.
68
-
69
-The chip expects programming through SWD using RAM/bootloader, not direct flash mapping.
70
-
71
-
72
-## ref
73
-
74
-- [[jlink-dat]]
... ...
\ No newline at end of file
SDK-dat/programming-dat/programming-dat.md
... ...
@@ -1,45 +0,0 @@
1
-
2
-# programming-dat
3
-
4
-- [[JTAG-dat]] - [[JLINK-dat]]
5
-
6
-- [[ISP-dat]] - [[ICP-dat]]
7
-
8
-| Feature | ICP (In-Circuit Programming) | ISP (In-System Programming) |
9
-| -------------------------- | ----------------------------------------------------------- | -------------------------------------------------------------- |
10
-| **Full Name** | In-Circuit Programming | In-System Programming |
11
-| **Purpose** | Programs a microcontroller while it is still on the circuit | Programs a microcontroller without removing it from the system |
12
-| **Connection Requirement** | Requires access to programming pins on the circuit board | Uses standard communication interfaces (SPI, UART, etc.) |
13
-| **Typical Usage Stage** | Manufacturing/test stage | Field updates and development stage |
14
-| **System Power** | Often requires external programming power | Uses system power (target board can be powered) |
15
-| **Microcontroller State** | Can be programmed even if microcontroller is blank | Assumes microcontroller has a working bootloader or interface |
16
-| **Tools Used** | Dedicated programmer/debugger (e.g., JTAG, SWD) | On-board bootloader, or external programmer via standard I/O |
17
-| **Flexibility** | Less flexible for field upgrades | More flexible; supports firmware updates without disassembly |
18
-| **Hardware Complexity** | May require additional programming circuitry | Minimal extra hardware required |
19
-| **Examples** | Programming via JTAG or SWD interfaces | Programming via USB, UART, SPI using bootloader or firmware |
20
-
21
-- [[hex-dat]] - [[bin-dat]]
22
-
23
-## ICP-dat
24
-
25
-If ISP fails or UART is unavailable, consider using ICP via SWD with Nuvoton's Nu-Link debugger.
26
-
27
-
28
-
29
-
30
-## Target
31
-
32
-### ARM
33
-
34
-- [[JLINK-dat]]
35
-
36
-
37
-### AVR
38
-
39
-- [[AVR-dat]]
40
-
41
-- [[avrdude-dat]]
42
-
43
-- [[DPR1045-dat]] - [[DPR1009-dat]]
44
-
45
-- [[CCO3626-dat]] - [[CCO3627-dat]]
... ...
\ No newline at end of file
Tech-dat/tech-dat.md
... ...
@@ -237,7 +237,7 @@
237 237
238 238
- [[soldering-dat]] - [[desoldering-dat]]
239 239
240
-- [[PCB-dat]] - [[PCBA-dat]] - [[PCB-design-dat]] - [[PCB-form-dat]]
240
+- [[PCB-dat]] - [[PCBA-dat]] - [[PCB-design-dat]] - [[PCB-form-dat]] - [[PCB-footprint-dat]]
241 241
242 242
- [[tools-dat]] - [[instrument-dat]]
243 243
board-series-dat/programmer-socket-dat/programmer-socket-dat.md
... ...
@@ -5,7 +5,16 @@
5 5
6 6
https://www.electrodragon.com/product-category/modules/programmer/ic-socket-programmer/
7 7
8
-- [[ISP-dat]] - [[footprint-dat]]
8
+- [[ISP-dat]] - [[PCB-footprint-dat]] - [[programmer-socket-dat]]
9
+
10
+
11
+## integrated programmer
12
+
13
+- [[DPR1009-dat]]
14
+
15
+- [[SP200-dat]] - [[DPR1057-dat]]
16
+
17
+
9 18
10 19
11 20