Home.md
... ...
@@ -17,7 +17,7 @@
17 17
18 18
- [[chip-dat]] - [[chip-cn-dat]]
19 19
20
-- [[Tech-DAT]] - [[power-dat]]
20
+- [[Tech-DAT]] - [[power-dat]] - [[display-dat]]
21 21
22 22
- [[app-dat]] - [[circuits-dat]] - [[tools-dat]]
23 23
Tech-dat/Interface-dat/HDMI-dat/2023-11-30-15-54-05.png
... ...
Binary files a/Tech-dat/Interface-dat/HDMI-dat/2023-11-30-15-54-05.png and /dev/null differ
Tech-dat/Interface-dat/HDMI-dat/2023-11-30-15-54-16.png
... ...
Binary files a/Tech-dat/Interface-dat/HDMI-dat/2023-11-30-15-54-16.png and /dev/null differ
Tech-dat/Interface-dat/HDMI-dat/2025-02-21-13-18-58.png
... ...
Binary files a/Tech-dat/Interface-dat/HDMI-dat/2025-02-21-13-18-58.png and /dev/null differ
Tech-dat/Interface-dat/HDMI-dat/2025-02-21-13-19-09.png
... ...
Binary files a/Tech-dat/Interface-dat/HDMI-dat/2025-02-21-13-19-09.png and /dev/null differ
Tech-dat/Interface-dat/HDMI-dat/2025-02-21-13-19-22.png
... ...
Binary files a/Tech-dat/Interface-dat/HDMI-dat/2025-02-21-13-19-22.png and /dev/null differ
Tech-dat/Interface-dat/HDMI-dat/2025-08-07-12-46-51.png
... ...
Binary files a/Tech-dat/Interface-dat/HDMI-dat/2025-08-07-12-46-51.png and /dev/null differ
Tech-dat/Interface-dat/HDMI-dat/HDMI-dat.md
... ...
@@ -1,51 +0,0 @@
1
-
2
-# HDMI-dat
3
-
4
-![](2023-11-30-15-54-05.png)
5
-
6
-![](2023-11-30-15-54-16.png)
7
-
8
-
9
-## Pins
10
-
11
-HDMI_TX2_P
12
-HDMI_TX2_N
13
-
14
-HDMI_TX1_P
15
-HDMI_TX1_N
16
-
17
-HDMI_TX0_P
18
-HDMI_TX0_N
19
-
20
-HDMI_CLK_P
21
-HDMI_CLK_N
22
-
23
-HDMI_CEC
24
-
25
-HDMI_SCL
26
-HDMI_SDA
27
-
28
-HDMI_5V
29
-
30
-HDMI_HOTPLUG
31
-
32
-## HDMI Connector
33
-
34
-![](2025-02-21-13-19-22.png)
35
-
36
-![](2025-02-21-13-18-58.png)
37
-
38
-![](2025-02-21-13-19-09.png)
39
-
40
-## SCH
41
-
42
-wiring to [[D1-dat]] - [[F133-dat]]
43
-
44
-![](2025-08-07-12-46-51.png)
45
-
46
-
47
-## Display Interface
48
-
49
-- [[HDMI-dat]] - [[VGA-dat]] - [[DVI-dat]]
50
-
51
-- [[audio-dat]]
... ...
\ No newline at end of file
Tech-dat/Interface-dat/LVDS-dat/LVDS-dat.md
... ...
@@ -1,3 +0,0 @@
1
-
2
-# LVDS-dat
3
-
Tech-dat/Interface-dat/VGA-dat/VGA-dat.md
... ...
@@ -1,29 +0,0 @@
1
-
2
-# VGA-dat
3
-
4
-## VGA for raspberry pi
5
-
6
-From the birth of the Raspberry-Pi there have been complaints about the lack of a VGA output. That has now been remedied. But only for the B+ and at the cost of losing most of your GPIOs.
7
-
8
-The BCM2835 has a parallel display interface on the GPIO pins. I did not publish this in the 2835 datasheet as 50% of the DPI pins where not on the GPIO connector, making it impossible to get any decent video out.
9
-
10
-The B+ however has all of the necessary DPI signals brought out. Dom has been working on the software side and the new DPI (read: VGA) driver software has been added to the latest release.
11
-
12
-### Resolution & Quality
13
-
14
-The VGA output supports the same resolutions as your HDMI one. Thus from 640x480 up to 1920x1024 60fps. At the highest resolution the pixel quality is almost as good as HDMI.
15
-
16
-If you look very closely there is a slight pixel crawl. The adapter uses a simple resistor ladder network as digital-to-analogue converter. Therefore the colour quality depends on how well balanced your resistors are.
17
-
18
-The video shown uses an adapter with 1% SMD resistors. There is a slight colour banding and with 6 bits per channel you have a maximum of 262144 colours.
19
-
20
-
21
-### Double screen
22
-In contrast to the composite video, the DPI interface can be run independent of the HDMI. Thus next to the HDMI screen, the VGA can be used as ‘second monitor’. The software for that is still under development but I expect that to arrive in the next two week.
23
-
24
-Beware that running two screens at maximum resolution will really eat into your SDRAM bandwidth. In fact it has not tried yet, so it might not be possible.
25
-
26
-
27
-## Connector
28
-
29
-- VGA female 15 = 3x5 pins
... ...
\ No newline at end of file
Tech-dat/interactive-dat/display-dat/LCD-dat/FPC-IPS-LCD-dat/2024-12-26-15-22-01.png
... ...
Binary files /dev/null and b/Tech-dat/interactive-dat/display-dat/LCD-dat/FPC-IPS-LCD-dat/2024-12-26-15-22-01.png differ
Tech-dat/interactive-dat/display-dat/LCD-dat/FPC-IPS-LCD-dat/FPC-IPS-LCD-dat.md
... ...
@@ -0,0 +1,22 @@
1
+
2
+# fpc-ips-lcd
3
+
4
+
5
+| Common Size | Status | Pins | Drive | Specs W x H | Installation | Pins |
6
+| ----------- | ------ | ----- | ------- | ----------- | ------------ | -------------------------------------------------------- |
7
+| 0.96 | Pick | 8Pin | ST7735 | IPS 80*160 | FPC | LEDA GND RESET RS SDA SCL VDD CS |
8
+| 1.14 | Pick | 8Pin | ST7789 | 135 x 240 | FPC | LEDA GND RESET RS SDA SCL VDD CS |
9
+| 1.3'' | | 12Pin | ST7789 | IPS 240*240 | | GND LEDK LEDA VDD GND GND DC CS SCL SDA RESET GND |
10
+| 1.44'' | Pick | 14Pin | ST7735 | IPS 128*128 | Soldering | GND VSS LEDK LEDA VSS RST AO SDA SCK VDD VDDI CS VSS GND |
11
+| 1.77'' | | 10Pin | ST7735 | IPS 128*160 | |
12
+| 1.77'' | | 12Pin | ST7735 | IPS 128*160 | | GND AO SCK SDA GND CS RSTB LEDK LEDA VCC VCC GND |
13
+| 1.77'' | | 14Pin | ST7735 | IPS 128*160 | |
14
+| 2.0'' | Pick | 12Pin | ST7789V | IPS 240*320 | Soldering | GND LEDK LEDA VCI GND AO CS SCL SDA RESET GND |
15
+| 2.4'' | | 15Pin | ST7789V | IPS 240*320 |
16
+| 2.8'' | Pick | 12Pin | ST7789 | IPS 240*320 | FPC | LEDK LEDA GND VCC IOVCC TE CS RESET DC SCK SDA GND |
17
+
18
+- [[ILC1075-dat]] - [[ilc1078-dat]]
19
+
20
+## SCH
21
+
22
+![](2024-12-26-15-22-01.png)
... ...
\ No newline at end of file
Tech-dat/interactive-dat/display-dat/LCD-dat/LCD-12864-dat/2024-02-17-17-52-18.png
... ...
Binary files a/Tech-dat/interactive-dat/display-dat/LCD-dat/LCD-12864-dat/2024-02-17-17-52-18.png and /dev/null differ
Tech-dat/interactive-dat/display-dat/LCD-dat/LCD-12864-dat/2024-09-05-17-24-29.png
... ...
Binary files a/Tech-dat/interactive-dat/display-dat/LCD-dat/LCD-12864-dat/2024-09-05-17-24-29.png and /dev/null differ
Tech-dat/interactive-dat/display-dat/LCD-dat/LCD-12864-dat/LCD-12864-dat.md
... ...
@@ -1,45 +0,0 @@
1
-
2
-# LCD-12864-dat
3
-
4
-## specs
5
-- Product name LCD module
6
-- Model 12864G
7
-- Appearance (L*W*H) 43.5*33.0*3.5
8
-- Viewing area (L*W) 39.8*25.5
9
-- Point (L*W)mm 0.26*0.33
10
-- Point (L*W)MM 0.29*0.36
11
-- IC model UC1701X
12
-- 5V/3.3V 3.3V
13
-- PCB board FPC interface, no PCB
14
-- Parallel/Serial Serial
15
-
16
-![](2024-02-17-17-52-18.png)
17
-
18
-legacy wiki page - https://www.electrodragon.com/w/12864min_LCD
19
-
20
-
21
-
22
-## schematic wiring
23
-
24
-### with arduino
25
-
26
-- CS - D10
27
-- CD - D9
28
-- RST - D8
29
-- SCK - D13
30
-- MISO - D12
31
-- MOSI - D11
32
-
33
-
34
-
35
-![](2024-09-05-17-24-29.png)
36
-
37
-
38
-## ref
39
-
40
-
41
-- [[ILC1007-dat]] - [[ILC1008-dat]]
42
-
43
-- [[chars-dat]]
44
-
45
-- [[UC1701X-dat]]
... ...
\ No newline at end of file
Tech-dat/interactive-dat/display-dat/LCD-dat/LCD12864-dat/2024-02-17-17-52-18.png
... ...
Binary files /dev/null and b/Tech-dat/interactive-dat/display-dat/LCD-dat/LCD12864-dat/2024-02-17-17-52-18.png differ
Tech-dat/interactive-dat/display-dat/LCD-dat/LCD12864-dat/2024-09-05-17-24-29.png
... ...
Binary files /dev/null and b/Tech-dat/interactive-dat/display-dat/LCD-dat/LCD12864-dat/2024-09-05-17-24-29.png differ
Tech-dat/interactive-dat/display-dat/LCD-dat/LCD12864-dat/LCD12864-dat.md
... ...
@@ -0,0 +1,45 @@
1
+
2
+# LCD12864-dat
3
+
4
+## specs
5
+- Product name LCD module
6
+- Model 12864G
7
+- Appearance (L*W*H) 43.5*33.0*3.5
8
+- Viewing area (L*W) 39.8*25.5
9
+- Point (L*W)mm 0.26*0.33
10
+- Point (L*W)MM 0.29*0.36
11
+- IC model UC1701X
12
+- 5V/3.3V 3.3V
13
+- PCB board FPC interface, no PCB
14
+- Parallel/Serial Serial
15
+
16
+![](2024-02-17-17-52-18.png)
17
+
18
+legacy wiki page - https://www.electrodragon.com/w/12864min_LCD
19
+
20
+
21
+
22
+## schematic wiring
23
+
24
+### with arduino
25
+
26
+- CS - D10
27
+- CD - D9
28
+- RST - D8
29
+- SCK - D13
30
+- MISO - D12
31
+- MOSI - D11
32
+
33
+
34
+
35
+![](2024-09-05-17-24-29.png)
36
+
37
+
38
+## ref
39
+
40
+
41
+- [[ILC1007-dat]] - [[ILC1008-dat]]
42
+
43
+- [[chars-dat]]
44
+
45
+- [[UC1701X-dat]]
... ...
\ No newline at end of file
Tech-dat/interactive-dat/display-dat/LCD-dat/fpc-ips-lcd/2024-12-26-15-22-01.png
... ...
Binary files a/Tech-dat/interactive-dat/display-dat/LCD-dat/fpc-ips-lcd/2024-12-26-15-22-01.png and /dev/null differ
Tech-dat/interactive-dat/display-dat/LCD-dat/fpc-ips-lcd/fpc-ips-lcd.md
... ...
@@ -1,22 +0,0 @@
1
-
2
-# fpc-ips-lcd
3
-
4
-
5
-| Common Size | Status | Pins | Drive | Specs W x H | Installation | Pins |
6
-| ----------- | ------ | ----- | ------- | ----------- | ------------ | -------------------------------------------------------- |
7
-| 0.96 | Pick | 8Pin | ST7735 | IPS 80*160 | FPC | LEDA GND RESET RS SDA SCL VDD CS |
8
-| 1.14 | Pick | 8Pin | ST7789 | 135 x 240 | FPC | LEDA GND RESET RS SDA SCL VDD CS |
9
-| 1.3'' | | 12Pin | ST7789 | IPS 240*240 | | GND LEDK LEDA VDD GND GND DC CS SCL SDA RESET GND |
10
-| 1.44'' | Pick | 14Pin | ST7735 | IPS 128*128 | Soldering | GND VSS LEDK LEDA VSS RST AO SDA SCK VDD VDDI CS VSS GND |
11
-| 1.77'' | | 10Pin | ST7735 | IPS 128*160 | |
12
-| 1.77'' | | 12Pin | ST7735 | IPS 128*160 | | GND AO SCK SDA GND CS RSTB LEDK LEDA VCC VCC GND |
13
-| 1.77'' | | 14Pin | ST7735 | IPS 128*160 | |
14
-| 2.0'' | Pick | 12Pin | ST7789V | IPS 240*320 | Soldering | GND LEDK LEDA VCI GND AO CS SCL SDA RESET GND |
15
-| 2.4'' | | 15Pin | ST7789V | IPS 240*320 |
16
-| 2.8'' | Pick | 12Pin | ST7789 | IPS 240*320 | FPC | LEDK LEDA GND VCC IOVCC TE CS RESET DC SCK SDA GND |
17
-
18
-- [[ILC1075-dat]] - [[ilc1078-dat]]
19
-
20
-## SCH
21
-
22
-![](2024-12-26-15-22-01.png)
... ...
\ No newline at end of file
Tech-dat/interactive-dat/display-dat/LCD-dat/parallel-display-dat/RGB-LCD-dat/RGB-LCD-dat.md
... ...
@@ -1,66 +1,16 @@
1 1
2 2
# RGB-LCD-dat
3 3
4
+- [[display-protocols-dat]]
4 5
5 6
## datasheet
6 7
7
-- 5.0 AT050TN43 == [[AT050TN43 V.1 Pre Ver01 20100511 (A050-43-TT-11)_201102115899.pdf]]
8
-- 4.3 FGD430A4005 == [[4.3inch_FGD430A4005_Spec.pdf]]
9
-
10
-
11
-## RGB to LVDS
12
-
13
-- [[LVDS-dat]]
14
-
15
-- [[GM8283-dat]]
16
-
17
-
18
-3通道RGB转LVDS芯片:
19
-
20
-SN75LVDS84
21
-
22
-SN75LVDS85
23
-
24
-SN65LVDS84
25
-
26
-DS90CF363
27
-
28
-DS90C365
29
-
30
-DS90CR217
31
-
32
-国产:
33
-
34
-GM8184
35
-
36
-GM8263C
37
-
8
+AT050TN43
38 9
10
+- 5.0 AT050TN43 == [[AT050TN43 V.1 Pre Ver01 20100511 (A050-43-TT-11)_201102115899.pdf]]
39 11
40
-## RGB to LVDS
41
-
42
-![](2025-07-16-14-55-33.png)
43
-
44
-
45
-
46
-## GM8283
47
-
48
-GM8283型28位并串转换预加重LVDS发送器主要用于视频/图像传输中的发送部分;它可将并行输入的28 bits LVTTL/LVCMOS数据和参考时钟转换为4路的串行LVDS数据流和1路LVDS同步时钟;在每一时钟周期内,24 bits的RGB数据和3 bits的控制数据分别在4个LVDS串行通道中传输。输入参考时钟频率为10MHz~90MHz,总数据率最高可达2520Mbps。
49
-
50
-GM8283内部模块由串行器、锁相环、LVDS驱动器和使能模块组成。内部工作情况如下:串行器载入28 bits并行数据后,在锁相环产生的多相位同步时钟的触发下将数据移出,同时利用多相位时钟将时钟信号与数据信号同步后输出。LVDS驱动器模块将串行器同步输出的4路串行数据流信号和1路同步时钟信号转化为LVDS形式的信号后输出。使能模块在待机状态下,可将内部模块电流关断,使器件进入低功耗状态。GM8283具有可编程数据选通控制功能,通过RFC控制可实现时钟对数据的上升沿采样或下降沿采样。
51
-
52
-GM8283可PIN-to-PIN替换的国外产品为: DS90C383、DS90C383A、DS90C383B、DS90C385、DS90C385A、DS90CR281、DS90CR283、DS90CR285 和DS90CR287、SN75LVDS81、SN75LVDS83、SN75LVDS83A、SN75LVDS83B、SN65LVDS93、SN65LVDS93A;
53
-
54
-GM8283不可PIN-to-PIN替换的国外产品为:DS90CF383、DS90CF383A和DS90CF383B;除非国外产品第17脚的焊盘做了可选到GND的连接。
55
-
56
-TI: SN75LVDS83
57
-
58
-THINE: THC63LVDM83C/83R/83D
59
-
60
-DOESTEK: DTC34LM85A
61
-
62
-NationalSemiconductor: DS90C385
63 12
13
+- 4.3 FGD430A4005 == [[4.3inch_FGD430A4005_Spec.pdf]]
64 14
65 15
66 16
... ...
@@ -117,4 +67,10 @@ touch
117 67
- XR
118 68
- YD
119 69
- XL
120
-- YU
... ...
\ No newline at end of file
0
+- YU
1
+
2
+
3
+
4
+## ref
5
+
6
+- [[github]]
... ...
\ No newline at end of file
Tech-dat/interactive-dat/display-dat/LCD-dat/segment-lcd-dat/2024-07-07-12-25-34.png
... ...
Binary files /dev/null and b/Tech-dat/interactive-dat/display-dat/LCD-dat/segment-lcd-dat/2024-07-07-12-25-34.png differ
Tech-dat/interactive-dat/display-dat/LCD-dat/segment-lcd-dat/2024-07-07-12-25-47.png
... ...
Binary files /dev/null and b/Tech-dat/interactive-dat/display-dat/LCD-dat/segment-lcd-dat/2024-07-07-12-25-47.png differ
Tech-dat/interactive-dat/display-dat/LCD-dat/segment-lcd-dat/segment-lcd-dat.md
... ...
@@ -0,0 +1,9 @@
1
+
2
+# segment-lcd-dat
3
+
4
+![](2024-07-07-12-25-34.png)
5
+
6
+
7
+## UA level power consumption
8
+
9
+![](2024-07-07-12-25-47.png)
... ...
\ No newline at end of file
Tech-dat/interactive-dat/display-dat/display-dat.md
... ...
@@ -1,78 +1,39 @@
1 1
2 2
# display-dat
3 3
4
-- [[display-SDK-dat]]
5 4
6
-parallel interface LCDs - [[EDL-LCD-dat]]
7
-
8
-SPI interface LCDs - [[EDS-LCD-dat]]
9
-
10
-- [[LCD-dat]]
11
-
12
-- [[OLED-dat]]
13
-
14
-- [[e-paper-dat]]
15 5
16
-- [[Nokia-5110-dat]]
17 6
18
-- [[image-dat]]
7
+## LCD
19 8
20
-## display interface protocols
9
+- [[LCD-dat]]
21 10
22
-**MIPI** stands for **Mobile Industry Processor Interface**.
11
+- [[FPC-IPS-LCD-dat]] - [[LCD1602-dat]] - [[LCD2004-dat]] - [[LCD12864-dat]]
23 12
24
-- [[MIPI-DSI-dat]] - [[HDMI-dat]] - [[LVDS-dat]] - [[VGA-dat]]
13
+- [[parallel-display-dat]] - [[DVP-display-dat]] - [[RGB-LCD-dat]]
25 14
26
-- [[eDP-dat]] - [[SLVS-EC-dat]]
15
+- [[segment-LCD-dat]]
27 16
28
-- [[parallel-display-dat]] - [[RGB-LCD-dat]]
17
+parallel interface LCDs - [[EDL-LCD-dat]]
29 18
30
-- [[MIPI-CSI-DAT]]
19
+SPI interface LCDs - [[EDS-LCD-dat]]
31 20
32
-### Other Display Interfaces
33 21
34
-#### 1. **MIPI-CSI** (Camera Serial Interface)
35
-- **Direction:** Camera → Processor
36
-- Also uses MIPI D-PHY (similar electrical layer as DSI).
37
-- Serial, differential, high-speed.
38
-- Instead of pixel-out, it’s pixel-in.
39 22
40
-#### 2. **LVDS** (Low-Voltage Differential Signaling)
41
-- Parallel pixel data serialized over multiple lanes.
42
-- Widely used in laptops before MIPI-DSI became popular.
43
-- Lower data rate per lane (~945 Mbps) but can use many lanes.
44
-- Simpler than DSI (no packet protocol like DSI).
23
+## other
45 24
46
-#### 3. **eDP** (Embedded DisplayPort)
47
-- Mostly used in laptops and tablets.
48
-- Based on DisplayPort standard.
49
-- Packet-based like DSI, but higher bandwidth (multi-Gbps per lane).
50
-- Supports very high resolutions (4K, 8K).
51 25
52
-#### 4. **HDMI**
53
-- For external displays/TVs.
54
-- Packetized video + audio.
55
-- Higher voltage, not as power-efficient as DSI.
56
-- Not usually used for mobile internal displays.
26
+- [[OLED-dat]]
57 27
58
-#### 5. **Parallel RGB / TTL**
59
-- Old-school direct pixel bus (1 wire per color bit + sync signals).
60
-- Very high pin count, no serialization.
61
-- Easy to understand but not good for high resolution.
28
+- [[e-paper-dat]]
62 29
63
-#### 6. **SLVS-EC** (Scalable Low Voltage Signaling – Embedded Clock)
64
-- Newer serial interface from Sony and others.
65
-- Competes with MIPI for camera & display links.
66
-- Higher speeds than D-PHY in some cases.
30
+- [[Nokia-5110-dat]]
67 31
68
----
32
+## tech
69 33
70
-💡 **Main takeaway:**
71
-- **MIPI-DSI** = optimized for **internal** mobile/tablet displays, low pin count, low EMI, power-efficient.
72
-- **LVDS** and **eDP** = laptop displays.
73
-- **HDMI** = external monitors/TVs.
74
-- **Parallel RGB** = simple, low-res systems.
34
+- [[image-dat]] - [[display-SDK-dat]]
75 35
36
+- [[display-protocols-dat]] - [[display-interfaces-dat]]
76 37
77 38
78 39
## repositories
Tech-dat/interactive-dat/display-dat/display-protocols-dat/HDMI-dat/2023-11-30-15-54-05.png
... ...
Binary files /dev/null and b/Tech-dat/interactive-dat/display-dat/display-protocols-dat/HDMI-dat/2023-11-30-15-54-05.png differ
Tech-dat/interactive-dat/display-dat/display-protocols-dat/HDMI-dat/2023-11-30-15-54-16.png
... ...
Binary files /dev/null and b/Tech-dat/interactive-dat/display-dat/display-protocols-dat/HDMI-dat/2023-11-30-15-54-16.png differ
Tech-dat/interactive-dat/display-dat/display-protocols-dat/HDMI-dat/2025-02-21-13-18-58.png
... ...
Binary files /dev/null and b/Tech-dat/interactive-dat/display-dat/display-protocols-dat/HDMI-dat/2025-02-21-13-18-58.png differ
Tech-dat/interactive-dat/display-dat/display-protocols-dat/HDMI-dat/2025-02-21-13-19-09.png
... ...
Binary files /dev/null and b/Tech-dat/interactive-dat/display-dat/display-protocols-dat/HDMI-dat/2025-02-21-13-19-09.png differ
Tech-dat/interactive-dat/display-dat/display-protocols-dat/HDMI-dat/2025-02-21-13-19-22.png
... ...
Binary files /dev/null and b/Tech-dat/interactive-dat/display-dat/display-protocols-dat/HDMI-dat/2025-02-21-13-19-22.png differ
Tech-dat/interactive-dat/display-dat/display-protocols-dat/HDMI-dat/2025-08-07-12-46-51.png
... ...
Binary files /dev/null and b/Tech-dat/interactive-dat/display-dat/display-protocols-dat/HDMI-dat/2025-08-07-12-46-51.png differ
Tech-dat/interactive-dat/display-dat/display-protocols-dat/HDMI-dat/HDMI-dat.md
... ...
@@ -0,0 +1,51 @@
1
+
2
+# HDMI-dat
3
+
4
+![](2023-11-30-15-54-05.png)
5
+
6
+![](2023-11-30-15-54-16.png)
7
+
8
+
9
+## Pins
10
+
11
+HDMI_TX2_P
12
+HDMI_TX2_N
13
+
14
+HDMI_TX1_P
15
+HDMI_TX1_N
16
+
17
+HDMI_TX0_P
18
+HDMI_TX0_N
19
+
20
+HDMI_CLK_P
21
+HDMI_CLK_N
22
+
23
+HDMI_CEC
24
+
25
+HDMI_SCL
26
+HDMI_SDA
27
+
28
+HDMI_5V
29
+
30
+HDMI_HOTPLUG
31
+
32
+## HDMI Connector
33
+
34
+![](2025-02-21-13-19-22.png)
35
+
36
+![](2025-02-21-13-18-58.png)
37
+
38
+![](2025-02-21-13-19-09.png)
39
+
40
+## SCH
41
+
42
+wiring to [[D1-dat]] - [[F133-dat]]
43
+
44
+![](2025-08-07-12-46-51.png)
45
+
46
+
47
+## Display Interface
48
+
49
+- [[HDMI-dat]] - [[VGA-dat]] - [[DVI-dat]]
50
+
51
+- [[audio-dat]]
... ...
\ No newline at end of file
Tech-dat/interactive-dat/display-dat/display-protocols-dat/LVDS-dat/LVDS-dat.md
... ...
@@ -0,0 +1,32 @@
1
+
2
+# LVDS-dat
3
+
4
+**LVDS** (Low-Voltage Differential Signaling) is an **electrical signaling standard**, not a specific video protocol.
5
+Whether it’s "parallel" or "serial" depends on how it’s used:
6
+
7
+## In Display Interfaces
8
+- **Old PC laptop panels** (LVDS display interface) use **serialized pixel data**:
9
+ - Pixel data from a parallel RGB bus is **serialized** into multiple LVDS lanes.
10
+ - Typically, **3 data pairs + 1 clock pair** for single link (supports up to ~1366×768).
11
+ - **6 data pairs + 1 clock pair** for dual link (for higher resolutions like 1920×1080).
12
+ - Each LVDS lane still carries data in a **parallel-to-serial** fashion internally.
13
+
14
+## Key Points
15
+- **LVDS = Serial differential transmission** (each lane is serial).
16
+- **LVDS display interface** = multiple serial lanes operating in parallel (multi-lane serial).
17
+- Main goal: lower EMI, higher speed, longer cable runs vs. raw parallel RGB.
18
+
19
+## Summary Table
20
+| Aspect | LVDS (as used in displays) |
21
+|-------------------------|---------------------------------------------|
22
+| Signal Type | Differential |
23
+| Transmission per lane | Serial |
24
+| Overall interface | Multiple serial lanes in parallel |
25
+| Typical Usage | Laptop screens, industrial monitors |
26
+| Speed per lane | Hundreds of Mbps |
27
+
28
+
29
+
30
+## ref
31
+
32
+- [[display-dat]]
... ...
\ No newline at end of file
Tech-dat/interactive-dat/display-dat/display-protocols-dat/RGB-to-LVDS-dat/RGB-to-LVDS-dat.md
... ...
@@ -0,0 +1,74 @@
1
+
2
+# RGB-to-LVDS-dat
3
+
4
+
5
+## RGB to LVDS
6
+
7
+- [[LVDS-dat]]
8
+
9
+- [[GM8283-dat]]
10
+
11
+
12
+3通道RGB转LVDS芯片:
13
+
14
+SN75LVDS84
15
+
16
+SN75LVDS85
17
+
18
+SN65LVDS84
19
+
20
+DS90CF363
21
+
22
+DS90C365
23
+
24
+DS90CR217
25
+
26
+国产:
27
+
28
+GM8184
29
+
30
+GM8263C
31
+
32
+
33
+
34
+## RGB to LVDS
35
+
36
+![](2025-07-16-14-55-33.png)
37
+
38
+
39
+
40
+## GM8283 LVDS Transmitter Overview
41
+
42
+The GM8283 is a 28-bit parallel-to-serial LVDS transmitter with pre-emphasis, mainly used for the transmission side in video/image transfer applications. It converts 28-bit parallel LVTTL/LVCMOS data and a reference clock into four channels of serial LVDS data streams and one channel of LVDS sync clock. In each clock cycle, 24 bits of RGB data and 3 bits of control data are transmitted across four LVDS serial channels. The input reference clock frequency ranges from 10MHz to 90MHz, with a maximum total data rate of up to 2520Mbps.
43
+
44
+### Internal Modules
45
+
46
+- **Serializer**: Loads 28-bit parallel data and, triggered by the multi-phase sync clock generated by the PLL, shifts out the data.
47
+- **Phase-Locked Loop (PLL)**: Generates multi-phase sync clocks for data and clock synchronization.
48
+- **LVDS Driver**: Converts the four serial data streams and one sync clock from the serializer into LVDS signals for output.
49
+- **Enable Module**: In standby mode, shuts down internal module currents to enter low-power state.
50
+
51
+### Features
52
+
53
+- Programmable data gating control: Clock can sample data on either rising or falling edge via RFC control.
54
+
55
+### Pin Compatibility
56
+
57
+- **Pin-to-Pin Compatible Foreign Products**:
58
+ - DS90C383, DS90C383A, DS90C383B, DS90C385, DS90C385A
59
+ - DS90CR281, DS90CR283, DS90CR285, DS90CR287
60
+ - SN75LVDS81, SN75LVDS83, SN75LVDS83A, SN75LVDS83B
61
+ - SN65LVDS93, SN65LVDS93A
62
+
63
+- **Not Pin-to-Pin Compatible**:
64
+ - DS90CF383, DS90CF383A, DS90CF383B (unless pin 17 pad is optionally connected to GND)
65
+
66
+### Equivalent and Related Chips
67
+
68
+- **Texas Instruments (TI)**: SN75LVDS83
69
+- **THINE**: THC63LVDM83C / 83R / 83D
70
+- **DOESTEK**: DTC34LM85A
71
+- **National Semiconductor**: DS90C385
72
+
73
+
74
+
Tech-dat/interactive-dat/display-dat/display-protocols-dat/VGA-dat/VGA-dat.md
... ...
@@ -0,0 +1,29 @@
1
+
2
+# VGA-dat
3
+
4
+## VGA for raspberry pi
5
+
6
+From the birth of the Raspberry-Pi there have been complaints about the lack of a VGA output. That has now been remedied. But only for the B+ and at the cost of losing most of your GPIOs.
7
+
8
+The BCM2835 has a parallel display interface on the GPIO pins. I did not publish this in the 2835 datasheet as 50% of the DPI pins where not on the GPIO connector, making it impossible to get any decent video out.
9
+
10
+The B+ however has all of the necessary DPI signals brought out. Dom has been working on the software side and the new DPI (read: VGA) driver software has been added to the latest release.
11
+
12
+### Resolution & Quality
13
+
14
+The VGA output supports the same resolutions as your HDMI one. Thus from 640x480 up to 1920x1024 60fps. At the highest resolution the pixel quality is almost as good as HDMI.
15
+
16
+If you look very closely there is a slight pixel crawl. The adapter uses a simple resistor ladder network as digital-to-analogue converter. Therefore the colour quality depends on how well balanced your resistors are.
17
+
18
+The video shown uses an adapter with 1% SMD resistors. There is a slight colour banding and with 6 bits per channel you have a maximum of 262144 colours.
19
+
20
+
21
+### Double screen
22
+In contrast to the composite video, the DPI interface can be run independent of the HDMI. Thus next to the HDMI screen, the VGA can be used as ‘second monitor’. The software for that is still under development but I expect that to arrive in the next two week.
23
+
24
+Beware that running two screens at maximum resolution will really eat into your SDRAM bandwidth. In fact it has not tried yet, so it might not be possible.
25
+
26
+
27
+## Connector
28
+
29
+- VGA female 15 = 3x5 pins
... ...
\ No newline at end of file
Tech-dat/interactive-dat/display-dat/display-protocols-dat/display-protocols-dat.md
... ...
@@ -0,0 +1,69 @@
1
+
2
+# display-protocols-dat
3
+
4
+
5
+## protocols convert
6
+
7
+- [[RGB-to-LVDS-dat]]
8
+
9
+
10
+
11
+## protocols
12
+
13
+**MIPI** stands for **Mobile Industry Processor Interface**.
14
+
15
+- [[MIPI-DSI-dat]] - [[HDMI-dat]] - [[LVDS-dat]] - [[VGA-dat]]
16
+
17
+- [[eDP-dat]] - [[SLVS-EC-dat]]
18
+
19
+- [[parallel-display-dat]] - [[RGB-LCD-dat]]
20
+
21
+- [[MIPI-CSI-DAT]] - [[MIPI-dat]]
22
+
23
+### Other Display Interfaces
24
+
25
+#### 1. **MIPI-CSI** (Camera Serial Interface)
26
+- **Direction:** Camera → Processor
27
+- Also uses MIPI D-PHY (similar electrical layer as DSI).
28
+- Serial, differential, high-speed.
29
+- Instead of pixel-out, it’s pixel-in.
30
+
31
+#### 2. **LVDS** (Low-Voltage Differential Signaling)
32
+- Parallel pixel data serialized over multiple lanes.
33
+- Widely used in laptops before MIPI-DSI became popular.
34
+- Lower data rate per lane (~945 Mbps) but can use many lanes.
35
+- Simpler than DSI (no packet protocol like DSI).
36
+
37
+#### 3. **eDP** (Embedded DisplayPort)
38
+- Mostly used in laptops and tablets.
39
+- Based on DisplayPort standard.
40
+- Packet-based like DSI, but higher bandwidth (multi-Gbps per lane).
41
+- Supports very high resolutions (4K, 8K).
42
+
43
+#### 4. **HDMI**
44
+- For external displays/TVs.
45
+- Packetized video + audio.
46
+- Higher voltage, not as power-efficient as DSI.
47
+- Not usually used for mobile internal displays.
48
+
49
+#### 5. **Parallel RGB / TTL**
50
+- Old-school direct pixel bus (1 wire per color bit + sync signals).
51
+- Very high pin count, no serialization.
52
+- Easy to understand but not good for high resolution.
53
+
54
+#### 6. **SLVS-EC** (Scalable Low Voltage Signaling – Embedded Clock)
55
+- Newer serial interface from Sony and others.
56
+- Competes with MIPI for camera & display links.
57
+- Higher speeds than D-PHY in some cases.
58
+
59
+---
60
+
61
+💡 **Main takeaway:**
62
+- **MIPI-DSI** = optimized for **internal** mobile/tablet displays, low pin count, low EMI, power-efficient.
63
+- **LVDS** and **eDP** = laptop displays.
64
+- **HDMI** = external monitors/TVs.
65
+- **Parallel RGB** = simple, low-res systems.
66
+
67
+## ref
68
+
69
+- [[display-dat]]
... ...
\ No newline at end of file
Tech-dat/interactive-dat/display-dat/segment-lcd-dat/2024-07-07-12-25-34.png
... ...
Binary files a/Tech-dat/interactive-dat/display-dat/segment-lcd-dat/2024-07-07-12-25-34.png and /dev/null differ
Tech-dat/interactive-dat/display-dat/segment-lcd-dat/2024-07-07-12-25-47.png
... ...
Binary files a/Tech-dat/interactive-dat/display-dat/segment-lcd-dat/2024-07-07-12-25-47.png and /dev/null differ
Tech-dat/interactive-dat/display-dat/segment-lcd-dat/segment-lcd-dat.md
... ...
@@ -1,9 +0,0 @@
1
-
2
-# segment-lcd-dat
3
-
4
-![](2024-07-07-12-25-34.png)
5
-
6
-
7
-## UA level power consumption
8
-
9
-![](2024-07-07-12-25-47.png)
... ...
\ No newline at end of file