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Chip-dat/74xx-dat/74xx-dat.md
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9 | 9 | ![](2024-09-20-11-33-37.png) |
10 | 10 | |
11 | 11 | |
12 | -- [[74hc595-dat]] |
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0 | +- [[74hc595-dat]] |
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1 | + |
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2 | +## inverter |
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3 | + |
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4 | +- [[74xx1G14-dat]] |
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5 | + |
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6 | + |
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7 | + |
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8 | + |
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9 | +| chip | gate | functions | and | |
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10 | +| ---------------- | -------------------- | ------------------------- | ----------------- | |
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11 | +| [[74xx1G00-dat]] | NAND | buffering, Level Shifting | | |
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12 | +| [[74xx1G07-dat]] | non-inverting buffer | | OPEN DRAIN OUTPUT | |
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13 | +| [[74xx1G08-dat]] | AND | | | |
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14 | +| [[74xx1G14-dat]] | inverting buffer | | | |
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Chip-dat/74xx-dat/74xx1G00-dat/2024-11-22-17-26-44.png
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Chip-dat/74xx-dat/74xx1G00-dat/74xx1G00-dat.md
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1 | + |
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2 | +# 74xx1G07-dat |
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3 | + |
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4 | +The 74LVC1G00 is a single 2-input NAND gate from the 74LVC family of high-speed CMOS logic devices. It is widely used in digital systems for its compact design, low power consumption, and versatile operation. |
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5 | + |
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6 | +## Key Features: |
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7 | + |
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8 | +1. 2-Input NAND Gate: |
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9 | + |
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10 | +Performs the NAND (NOT AND) logic operation: |
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11 | + |
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12 | + Output = NOT (A AND B) |
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13 | + |
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14 | +![](2024-11-22-17-26-44.png) |
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15 | + |
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16 | +The output is LOW only when both inputs are HIGH. |
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17 | + |
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18 | +2. High-Speed Operation: |
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19 | + |
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20 | +Supports high-frequency operation with fast propagation delay, typical for modern CMOS technology. |
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21 | + |
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22 | +3. Wide Voltage Range: |
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23 | + |
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24 | +Operates from 1.65V to 5.5V, making it suitable for both low-voltage and standard-voltage digital systems. |
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25 | + |
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26 | +4. Low Power Consumption: |
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27 | + |
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28 | +Consumes minimal static and dynamic power, ideal for battery-operated devices. |
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29 | + |
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30 | +5. Compact Package: |
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31 | + |
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32 | +Available in small packages like SOT-23-5, SC-70, or DFN, suitable for space-constrained designs. |
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33 | + |
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34 | +6. Overvoltage Tolerance: |
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35 | + |
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36 | +Inputs are 5V tolerant, meaning they can handle 5V signals even when operating at lower supply voltages. |
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37 | + |
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38 | +7. Schmitt-Trigger Inputs: |
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39 | + |
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40 | +Provides noise immunity and clean switching behavior for slow or noisy input signals. |
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41 | + |
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42 | +## Functions and Applications: |
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43 | + |
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44 | +Logic Operations: |
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45 | + |
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46 | +Used to implement NAND logic, a fundamental building block in digital electronics. |
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47 | + |
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48 | +Signal Conditioning: |
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49 | + |
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50 | +Cleans up noisy input signals and ensures clean digital transitions. |
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51 | + |
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52 | +Universal Logic: |
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53 | + |
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54 | +The NAND gate is universal; it can be combined to form any other logic gate (AND, OR, NOT, etc.). |
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55 | + |
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56 | +Level Shifting: |
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57 | + |
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58 | +Can act as a simple level shifter for low-to-high voltage interfacing, depending on the circuit design. |
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59 | + |
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60 | +Clock and Control Logic: |
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61 | + |
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62 | +Used in control circuits, clock generation, and synchronization. |
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Chip-dat/74xx-dat/74xx1G07-dat/2024-11-22-17-23-21.png
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Chip-dat/74xx-dat/74xx1G07-dat/74xx1G07-dat.md
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1 | + |
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2 | +# 74xx1G07-dat |
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3 | + |
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4 | +The 74HC1G07 is a single buffer with an open-drain output, part of the 74HC family of high-speed CMOS logic devices. It is used in various digital applications requiring buffering and interfacing. |
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5 | + |
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6 | +https://www.onsemi.com/download/data-sheet/pdf/mc74vhc1g07-d.pdf |
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7 | + |
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8 | +![](2024-11-22-17-23-21.png) |
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9 | + |
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10 | +## Key Features: |
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11 | + |
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12 | +Open-Drain Output: |
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13 | + |
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14 | +The open-drain output requires an external pull-up resistor to operate. |
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15 | + |
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16 | +It allows the output to pull the signal to low (0) but cannot actively drive it to high (1). Instead, the external resistor pulls it to the high level. |
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17 | + |
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18 | +High-Speed Operation: |
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19 | + |
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20 | +Operates at high frequencies typical of CMOS technology. |
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21 | + |
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22 | +Wide Voltage Range: |
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23 | + |
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24 | +Functions over a voltage range of 2.0V to 5.5V, making it suitable for mixed-voltage systems. |
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25 | + |
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26 | +High Drive Capability: |
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27 | + |
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28 | +Can sink relatively large currents, useful for driving LEDs or other loads. |
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29 | + |
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30 | +Input Compatibility: |
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31 | + |
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32 | +Inputs are TTL-compatible, meaning it works well in systems interfacing with older logic standards. |
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33 | + |
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34 | +Compact Package: |
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35 | + |
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36 | +Available in small form-factor packages like SOT-23-5 and SC-70, ideal for compact designs. |
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37 | + |
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38 | +Low Power Consumption: |
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39 | + |
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40 | +Consumes minimal power when idle, an advantage of CMOS technology. |
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41 | + |
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42 | + |
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43 | +## Functions and Applications: |
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44 | + |
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45 | +Buffering: |
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46 | + |
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47 | +Buffers signals to increase driving strength for long lines or multiple loads. |
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48 | + |
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49 | +Level Shifting: |
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50 | + |
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51 | +With appropriate pull-up resistors, it can be used to interface between devices operating at different voltage levels. |
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52 | + |
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53 | +Wired-AND Logic: |
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54 | + |
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55 | +Open-drain outputs allow multiple 74HC1G07 devices to share a single pull-up resistor, enabling wired-AND logic without additional components. |
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56 | + |
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57 | +Driving LEDs or Relays: |
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58 | + |
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59 | +The device can drive LEDs, relays, or other components that require higher current. |
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60 | + |
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61 | +Interfacing: |
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62 | + |
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63 | +Useful for interfacing microcontrollers or other digital circuits with external devices. |
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Chip-dat/74xx-dat/74xx1G08-dat/2024-11-22-17-28-16.png
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Chip-dat/74xx-dat/74xx1G08-dat/74xx1G08-dat.md
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1 | + |
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2 | +# 74xx1G00-dat.md |
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3 | + |
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4 | + |
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5 | +![](2024-11-22-17-28-16.png) |
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Chip-dat/74xx-dat/74xx1G14-dat/2024-11-22-17-22-42.png
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Chip-dat/74xx-dat/74xx1G14-dat/74xx1G14-dat.md
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1 | + |
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2 | +# 74xx1G14-dat |
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3 | + |
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4 | + |
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5 | +The MC74VHC1G14DFT1G is a single inverting Schmitt trigger manufactured by ON Semiconductor. It is part of the VHC (Very High-Speed CMOS) family and is designed for high-speed and low-power applications. |
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6 | + |
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7 | +An inverting Schmitt trigger is a type of digital circuit that converts an input signal with noise or slow transitions into a clean, sharp digital output. It is "inverting" because the output signal is the logical opposite (inverted) of the input signal. |
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8 | + |
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9 | +Inverting Operation: |
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10 | + |
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11 | +The output is inverted compared to the input: |
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12 | +- When the input voltage exceeds the upper threshold, the output switches to LOW. |
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13 | +- When the input voltage drops below the lower threshold, the output switches to HIGH. |
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14 | + |
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15 | + |
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16 | +https://www.mouser.com/datasheet/2/916/74HC_HCT1G14-1385566.pdf?srsltid=AfmBOopmI2Sb0NtOkBFdYvsbVQHwVz-8gI-lhVkF_7wKB0Xu7qpUoi9H |
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17 | + |
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18 | + |
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19 | +![](2024-11-22-17-22-42.png) |
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20 | + |
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21 | + |
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22 | +- [[74xx-dat]] |
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