877ccc214b666f00f0f5745363ae2ee06d3ba880
Chip-dat/Analog-device-dat/Analog-device-dat.md
| ... | ... | @@ -35,7 +35,6 @@ |
| 35 | 35 | |
| 36 | 36 | - [[LVDT-dat]] - [[signal-dat]] |
| 37 | 37 | |
| 38 | - |
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| 39 | 38 | - ad7190-dat |
| 40 | 39 | |
| 41 | 40 | - [[ADC-dat]] - [[AD-ADC-dat]] |
| ... | ... | @@ -44,8 +43,9 @@ |
| 44 | 43 | |
| 45 | 44 | - [[max9813-dat]] - [[MAX9812-dat]] |
| 46 | 45 | |
| 46 | +- [[analog-device-dat]] - [[ADV453-dat]] - CMOS 66 MHz Monolithic 256324 Color Palette RAM-DAC - [[DAC-dat]] |
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| 47 | 47 | |
| 48 | - |
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| 48 | +The ADV453 is a complete analog video output RAM-DAC on a single monolithic chip. It is specifically designed for high resolution color graphics systems. The part contains a 256 3 24 color lookup table, a 3 3 24 overlay palette as well as triple 8-bit video D/A converters. The ADV453 is capable of simultaneously displaying up to 259 colors, 256 from the lookup table and three from the overlay registers, out of a total color palette of 16.8 million addressable colors. |
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| 49 | 49 | |
| 50 | 50 | ## adum |
| 51 | 51 |
Chip-dat/Infineon-dat/cypress-dat/cypress-dat.md
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| 1 | + |
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| 2 | + |
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| 3 | +# cypress-dat |
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| 4 | + |
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| 5 | +- [[cypress-dat]] - [[infineon-dat]] - [[RAM-dat]] |
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| 6 | + |
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| 7 | + |
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| 8 | + |
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| 9 | +## RAM |
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| 10 | + |
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| 11 | + |
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| 12 | + |
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| 13 | +## ref |
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| ... | ... | \ No newline at end of file |
Tech-dat/DAC-dat/DAC-dat.md
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| 14 | 14 | |
| 15 | 15 | legacy wiki page == https://www.electrodragon.com/w/AD/DA |
| 16 | 16 | |
| 17 | +- [[analog-device-dat]] - [[ADV453-dat]] - CMOS 66 MHz Monolithic 256324 Color Palette RAM-DAC - [[DAC-dat]] |
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| 18 | + |
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| 19 | + |
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| 20 | + |
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| 21 | + |
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| 17 | 22 | |
| 18 | 23 | ## boards |
| 19 | 24 |
Tech-dat/memory-dat/RAM-dat/2026-06-23-13-16-19.png
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Tech-dat/memory-dat/RAM-dat/RAM-dat.md
| ... | ... | @@ -1,11 +1,36 @@ |
| 1 | 1 | |
| 2 | 2 | # RAM-dat |
| 3 | 3 | |
| 4 | -- [[DRAM-dat]] - [[PSRAM-dat]] - [[SDRAM-dat]] |
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| 4 | + |
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| 5 | +- [[memory-dat]] - [[flash-dat]] - [[sd-dat]] - [[eeprom-dat]] - [[DRAM-dat]] - [[SDram-dat]] - [[RAM-dat]] |
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| 6 | + |
|
| 7 | +- [[cypress-dat]] - [[infineon-dat]] - [[RAM-dat]] |
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| 8 | + |
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| 9 | +- [[DRAM-dat]] - [[PSRAM-dat]] - [[SDRAM-dat]] - [[nvSRAM-dat]] |
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| 5 | 10 | |
| 6 | 11 | |
| 7 | 12 | - [[dallas-dat]] |
| 8 | 13 | |
| 14 | +## nvSRAM |
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| 15 | + |
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| 16 | + |
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| 17 | +- STK12C68-5L35M |
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| 18 | +- STK12C68-5L40M |
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| 19 | +- STK12C68-5L55M |
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| 20 | + |
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| 21 | + |
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| 22 | + |
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| 23 | +STK12C68 - 64 Kbit (8 K x 8) AutoStore nvSRAM |
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| 24 | + |
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| 25 | +The Cypress STK12C68 is a fast static RAM with a nonvolatile element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the world’s most reliable nonvolatile memory. The SRAM provides unlimited read and write cycles, while independent nonvolatile data resides in the highly reliable QuantumTrap cell. Data transfers from the SRAM to the nonvolatile elements (the STORE operation) takes place automatically at power-down. On power-up, data is restored to the SRAM (the RECALL operation) from the nonvolatile memory. Both the STORE and RECALL operations are also available under software control. A hardware STORE is initiated with the HSB pin. |
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| 26 | + |
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| 27 | +For a complete list of related documentation, click here. |
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| 28 | + |
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| 29 | +https://www.infineon.com/assets/row/public/documents/10/57/infineon-stk12c68-64-kbit-8-k-x-8-autostore-nvsram-datasheet-additionaltechnicalinformation-en.pdf?fileId=8ac78c8c7d0d8da4017d0ecc045f45bf |
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| 30 | + |
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| 31 | + |
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| 32 | + |
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| 33 | + |
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| 9 | 34 | |
| 10 | 35 | |
| 11 | 36 | ## ref |
Tech-dat/tech-dat.md
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| 205 | 205 | |
| 206 | 206 | - [[serial-dat]] - [[serial-wireless-dat]] - [[CP2104-dat]] |
| 207 | 207 | |
| 208 | -- [[memory-dat]] - [[flash-dat]] - [[sd-dat]] - [[eeprom-dat]] - [[DRAM-dat]] - [[SDram-dat]] |
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| 208 | +- [[memory-dat]] - [[flash-dat]] - [[sd-dat]] - [[eeprom-dat]] - [[DRAM-dat]] - [[SDram-dat]] - [[RAM-dat]] |
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| 209 | 209 | |
| 210 | 210 | - [[signal-dat]] - [[analog-dat]] - [[digital-dat]] - [[data-storage-dat]] |
| 211 | 211 |