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Board-dat/NWI/NWI1059-dat/2023-10-30-16-21-51.png
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Board-dat/NWI/NWI1059-dat/2023-10-30-16-27-53.png
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Board-dat/NWI/NWI1059-dat/2023-10-30-16-37-34.png
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Board-dat/NWI/NWI1059-dat/2023-10-30-16-38-11.png
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Board-dat/NWI/NWI1059-dat/2023-10-30-16-40-03.png
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Board-dat/NWI/NWI1059-dat/NWI1059-dat.md
... | ... | @@ -1,129 +1,6 @@ |
1 | 1 | # NWI1059-dat |
2 | 2 | |
3 | -The ESP-12F WiFi module was developed by Ai-Thinker Technology. The core processor ESP8266 integrates the industry-leading Tensilica L106 ultra-low-power 32-bit micro MCU in a small package with 16-bit Lite mode, clocked at Supports 80 MHz and 160 MHz, supports RTOS, and integrates Wi-Fi MAC/BB/RF/PA/LNA. |
|
3 | +https://www.electrodragon.com/product/esp-12f-esp8266-wifi-board/ |
|
4 | 4 | |
5 | -The ESP-12F WiFi module supports the standard IEEE802.11 b/g/n protocol, a complete TCP/IP protocol stack. Users can use this module to add networking capabilities to existing devices or to build separate network controllers. |
|
5 | +- [[ESP-12F-dat]] - [[ESP8266-dat]] |
|
6 | 6 | |
7 | -The ESP8266 is a high-performance wireless SOC that offers maximum utility at the lowest cost and unlimited possibilities for embedding WiFi functionality into other systems. |
|
8 | - |
|
9 | -![](2023-10-30-16-27-53.png) |
|
10 | - |
|
11 | -The ESP8266 is a complete and self-contained WiFi network solution that can operate independently or as a slave running on other host MCUs. The ESP8266 is capable of booting directly from an external flash memory when it is powered by an application and is the only application processor in the device. The built-in cache helps improve system performance and reduce memory requirements. |
|
12 | - |
|
13 | -In another case, the ESP8266 is responsible for wireless Internet access. When it comes to the task of the WiFi adapter, it can be added to any micro controller-based design. The connection is simple and easy, just by SPI / SDIO interface or I2C / UART port. Just fine. |
|
14 | - |
|
15 | -The ESP8266's powerful on-chip processing and storage capabilities allow it to integrate sensors and other application-specific devices through the GPIO port, minimizing system resources during minimal up-front development and operation. |
|
16 | - |
|
17 | -## Dimension and Pins |
|
18 | - |
|
19 | -![](2023-10-30-16-27-30.png) |
|
20 | - |
|
21 | -## Features |
|
22 | - |
|
23 | -- The smallest 802.11b/g/n Wi-Fi SOC module |
|
24 | -- Low power 32-bit CPU, can also serve as the application processor |
|
25 | -- Up to 160MHz clock speed |
|
26 | -- Built-in 10 bit high precision ADC |
|
27 | -- Supports UART/GPIO/IIC/PWM/ADC |
|
28 | -- SMD-22 package for easy welding |
|
29 | -- Integrated Wi-Fi MAC/BB/RF/PA/LNA |
|
30 | -- Support multiple sleep patterns. Deep sleep current as low as 20uA |
|
31 | -- UART baud rate up to 4Mbps |
|
32 | -- Embedded LWIP protocol stack |
|
33 | -- Supports STA/AP/STA + AP operation mode |
|
34 | -- Support Smart Config/AirKiss technology |
|
35 | -- Supports remote firmware upgrade (FOTA) |
|
36 | -- General AT commands can be used quickly |
|
37 | -- Support for the two development, integration of windows, Linux development environment Ai |
|
38 | - |
|
39 | -## Product Specification |
|
40 | - |
|
41 | -| Specs | - | |
|
42 | -| ---------------------- | -------------------------------------------------------------------------------------------------------------------------------------------------- | |
|
43 | -| Module Model E | SP-12F | |
|
44 | -| Package | SMD22 | |
|
45 | -| Size | 24*16*3(±0.2)mm | |
|
46 | -| Certification | FCCǃCEǃICǃREACHǃRoHS | |
|
47 | -| SPI Flash Default | 32Mbit | |
|
48 | -| Interface | UART/GPIO/ADC/PWM | |
|
49 | -| IO Port | 9 | |
|
50 | -| UART Baud rate Support | 300 ~ 4608000 bps ˈDefault 115200 bps | |
|
51 | -| Frequency Range | 2412 ~ 2484MHz | |
|
52 | -| Antenna | PCB Antenna | |
|
53 | -| Transmit Power | - 802.11b: 16±2 dBm (@11Mbps) - 802.11g: 14±2 dBm (@54Mbps) - 802.11n: 13±2 dBm (@HT20, MCS7) | |
|
54 | -| Receiving Sensitivity | - CCK, 1 Mbps : -90dBm - CCK, 11 Mbps: -85dBm - 6 Mbps (1/2 BPSK): -88dBm - 54 Mbps (3/4 64-QAM): -70dBm - HT20, MCS7 (65 Mbps, 72.2 Mbps): -67dBm | |
|
55 | -| Power | - (Typical Values) - Continuous Transmission=>Average˖~71mAˈPeak˖ - 500mA - Modem Sleep: ~20mA - Light Sleep: ~2mA - Deep Sleep: ~0.02mA | |
|
56 | -| Security | WEP/WPA-PSK/WPA2-PSK | |
|
57 | -| Power Supply Voltage | 3.0V ~ 3.6VˈTypical 3.3VˈCurrent >500mA | |
|
58 | -| Operating Temperature | -20 C ~ 85 C | |
|
59 | -| Storage Environment | -40 C ~ 85 C , < 90%RH | |
|
60 | - |
|
61 | -## Pin Definition |
|
62 | - |
|
63 | -![](2023-10-30-16-33-38.png) |
|
64 | - |
|
65 | -| No. | Pin Name | Functional Description | |
|
66 | -| --- | -------- | ------------------------------------------------------------------- | |
|
67 | -| 1 | RST | Reset Pin, Active Low | |
|
68 | -| 2 | ADC | AD conversion, Input voltage range 0~1V, the value range is 0~1024. | |
|
69 | -| 3 | EN | Chip Enabled Pin, Active High | |
|
70 | -| 4 | IO16 | Connect with RST pin to wake up Deep Sleep | |
|
71 | -| 5 | IO14 | GPIO14; HSPI_CLK | |
|
72 | -| 6 | IO12 | GPIO12; HSPI_MISO | |
|
73 | -| 7 | IO13 | GPIO13; HSPI_MOSI; UART0_CTS | |
|
74 | -| 8 | VCC | Module power supply pin, Voltage 3.0V ~ 3.6V | |
|
75 | -| 9 | GND | GND | |
|
76 | -| 10 | IO15 | GPIO15; MTDO; HSPICS; UART0_RTS | |
|
77 | -| 11 | IO2 | GPIO2; UART1_TXD | |
|
78 | -| 12 | IO0 | GPIO0;HSPI_MISO;I2SI_DATA | |
|
79 | -| 13 | IO4 | GPIO4 | |
|
80 | -| 14 | IO5 | GPIO5;IR_R | |
|
81 | -| 15 | RXD | UART0_RXD; GPIO3 | |
|
82 | -| 16 | TXD | UART0_TXD; GPIO1 | |
|
83 | - |
|
84 | -## Boot Mode |
|
85 | - |
|
86 | -Description of the ESP series module boot mode |
|
87 | - |
|
88 | -| Mode | CH_PD(EN) | RST | GPIO15 | GPIO0 | GPIO2 | TXD0 | |
|
89 | -| ------------- | --------- | ---- | ------ | ----- | ----- | ---- | |
|
90 | -| Download mode | high | high | low | low | high | high | |
|
91 | -| Running mode | high | high | low | high | high | high | |
|
92 | - |
|
93 | -- Notes: Some of the pins inside the module have been pulled or pulled down, please |
|
94 | - refer to the schematic diagram. |
|
95 | - |
|
96 | -## reflow profile |
|
97 | - |
|
98 | -![](2023-10-30-16-37-34.png) |
|
99 | - |
|
100 | - |
|
101 | -## peripheral schematic |
|
102 | - |
|
103 | -Application circuit |
|
104 | - |
|
105 | - |
|
106 | -- CHPD - pull up |
|
107 | -- IO2 - pull up |
|
108 | -- IO0 - pull up - press down button |
|
109 | -- IO15 - pull down |
|
110 | -- Reset - press down button |
|
111 | -- ADC -voltage divider ladder |
|
112 | - |
|
113 | -![](2023-10-30-16-38-11.png) |
|
114 | - |
|
115 | -![](2023-10-30-16-21-51.png) |
|
116 | - |
|
117 | -## SCH |
|
118 | - |
|
119 | -![](2023-10-30-16-40-03.png) |
|
120 | -![](2023-10-30-16-23-39.png) |
|
121 | - |
|
122 | - |
|
123 | - |
|
124 | -## ref |
|
125 | - |
|
126 | -- legacy chip wiki page here - https://w.electrodragon.com/w/Category:ESP8266 |
|
127 | -- legacy module page - https://w.electrodragon.com/w/ESP-12F_ESP8266_Wifi_Board |
|
128 | - |
|
129 | -- [[esp-modules-dat]] |
|
... | ... | \ No newline at end of file |
Board-dat/NWI/NWI1059-dat/esp-12f_product_specification_en.pdf
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Board-dat/NWI/NWI1086-dat/NWI1086-dat.md
... | ... | @@ -0,0 +1,9 @@ |
1 | + |
|
2 | +# NWI1086-dat |
|
3 | + |
|
4 | + |
|
5 | +https://www.electrodragon.com/product/esp-12s-wifi-module-esp8266/ |
|
6 | + |
|
7 | +## ref |
|
8 | + |
|
9 | +- [[ESP8266-dat]] - [[ESP-12S-dat]] |
|
... | ... | \ No newline at end of file |
Chip-cn-dat/AIT/ESP-12F-DAT/ESP-12F-DAT.md
... | ... | @@ -3,13 +3,18 @@ |
3 | 3 | |
4 | 4 | ![](43-27-15-15-12-2022.png) |
5 | 5 | |
6 | +## ref |
|
6 | 7 | |
7 | -https://docs.ai-thinker.com/_media/esp8266/docs/esp-12f_product_specification_en.pdf |
|
8 | +- legacy chip wiki page here - https://w.electrodragon.com/w/Category:ESP8266 |
|
9 | +- legacy module page - https://w.electrodragon.com/w/ESP-12F_ESP8266_Wifi_Board |
|
8 | 10 | |
9 | -https://www.elecrow.com/download/ESP-12F.pdf |
|
11 | + |
|
12 | + |
|
13 | +## Internal SCH |
|
10 | 14 | |
11 | 15 | ![](07-54-23-22-03-2023.png) |
12 | 16 | |
17 | +## Pin Definitions |
|
13 | 18 | |
14 | 19 | | left | -- | right | -- | func | |
15 | 20 | | ---- | -------------------------- | ----- | ------------------ | ----------- | |
... | ... | @@ -23,4 +28,14 @@ https://www.elecrow.com/download/ESP-12F.pdf |
23 | 28 | | VCC | | GND | | | |
24 | 29 | |
25 | 30 | |
26 | -- on module LED IO2: low to on |
|
... | ... | \ No newline at end of file |
0 | +- on module LED IO2: low to on |
|
1 | + |
|
2 | + |
|
3 | +## datasheet |
|
4 | + |
|
5 | +- [[ESP-12F-DS.pdf]] |
|
6 | +- [[ESP-12F-DS2-dat]] |
|
7 | +- |
|
8 | +## ref |
|
9 | + |
|
10 | +- [[ESP8266-dat]] |
|
... | ... | \ No newline at end of file |
Chip-cn-dat/AIT/ESP-12F-DAT/ESP-12F-DS.pdf
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Chip-cn-dat/AIT/ESP-12F-DAT/ESP-12F-DS2-dat/2023-10-30-16-40-03.png
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Chip-cn-dat/AIT/ESP-12F-DAT/ESP-12F-DS2-dat/ESP-12F-DS2-dat.md
... | ... | @@ -0,0 +1,132 @@ |
1 | + |
|
2 | +# ESP-12F-DS2-dat |
|
3 | + |
|
4 | +## Brief Info |
|
5 | + |
|
6 | +The ESP-12F WiFi module was developed by Ai-Thinker Technology. The core processor ESP8266 integrates the industry-leading Tensilica L106 ultra-low-power 32-bit micro MCU in a small package with 16-bit Lite mode, clocked at Supports 80 MHz and 160 MHz, supports RTOS, and integrates Wi-Fi MAC/BB/RF/PA/LNA. |
|
7 | + |
|
8 | +The ESP-12F WiFi module supports the standard IEEE802.11 b/g/n protocol, a complete TCP/IP protocol stack. Users can use this module to add networking capabilities to existing devices or to build separate network controllers. |
|
9 | + |
|
10 | +The ESP8266 is a high-performance wireless SOC that offers maximum utility at the lowest cost and unlimited possibilities for embedding WiFi functionality into other systems. |
|
11 | + |
|
12 | +![](2023-10-30-16-27-53.png) |
|
13 | + |
|
14 | +The ESP8266 is a complete and self-contained WiFi network solution that can operate independently or as a slave running on other host MCUs. The ESP8266 is capable of booting directly from an external flash memory when it is powered by an application and is the only application processor in the device. The built-in cache helps improve system performance and reduce memory requirements. |
|
15 | + |
|
16 | +In another case, the ESP8266 is responsible for wireless Internet access. When it comes to the task of the WiFi adapter, it can be added to any micro controller-based design. The connection is simple and easy, just by SPI / SDIO interface or I2C / UART port. Just fine. |
|
17 | + |
|
18 | +The ESP8266's powerful on-chip processing and storage capabilities allow it to integrate sensors and other application-specific devices through the GPIO port, minimizing system resources during minimal up-front development and operation. |
|
19 | + |
|
20 | + |
|
21 | +## Dimension and Pins |
|
22 | + |
|
23 | +![](2023-10-30-16-27-30.png) |
|
24 | + |
|
25 | +## Features |
|
26 | + |
|
27 | +- The smallest 802.11b/g/n Wi-Fi SOC module |
|
28 | +- Low power 32-bit CPU, can also serve as the application processor |
|
29 | +- Up to 160MHz clock speed |
|
30 | +- Built-in 10 bit high precision ADC |
|
31 | +- Supports UART/GPIO/IIC/PWM/ADC |
|
32 | +- SMD-22 package for easy welding |
|
33 | +- Integrated Wi-Fi MAC/BB/RF/PA/LNA |
|
34 | +- Support multiple sleep patterns. Deep sleep current as low as 20uA |
|
35 | +- UART baud rate up to 4Mbps |
|
36 | +- Embedded LWIP protocol stack |
|
37 | +- Supports STA/AP/STA + AP operation mode |
|
38 | +- Support Smart Config/AirKiss technology |
|
39 | +- Supports remote firmware upgrade (FOTA) |
|
40 | +- General AT commands can be used quickly |
|
41 | +- Support for the two development, integration of windows, Linux development environment Ai |
|
42 | + |
|
43 | + |
|
44 | + |
|
45 | + |
|
46 | + |
|
47 | +## Product Specification |
|
48 | + |
|
49 | +| Specs | - | |
|
50 | +| ---------------------- | -------------------------------------------------------------------------------------------------------------------------------------------------- | |
|
51 | +| Module Model E | SP-12F | |
|
52 | +| Package | SMD22 | |
|
53 | +| Size | 24*16*3(±0.2)mm | |
|
54 | +| Certification | FCCǃCEǃICǃREACHǃRoHS | |
|
55 | +| SPI Flash Default | 32Mbit | |
|
56 | +| Interface | UART/GPIO/ADC/PWM | |
|
57 | +| IO Port | 9 | |
|
58 | +| UART Baud rate Support | 300 ~ 4608000 bps ˈDefault 115200 bps | |
|
59 | +| Frequency Range | 2412 ~ 2484MHz | |
|
60 | +| Antenna | PCB Antenna | |
|
61 | +| Transmit Power | - 802.11b: 16±2 dBm (@11Mbps) - 802.11g: 14±2 dBm (@54Mbps) - 802.11n: 13±2 dBm (@HT20, MCS7) | |
|
62 | +| Receiving Sensitivity | - CCK, 1 Mbps : -90dBm - CCK, 11 Mbps: -85dBm - 6 Mbps (1/2 BPSK): -88dBm - 54 Mbps (3/4 64-QAM): -70dBm - HT20, MCS7 (65 Mbps, 72.2 Mbps): -67dBm | |
|
63 | +| Power | - (Typical Values) - Continuous Transmission=>Average˖~71mAˈPeak˖ - 500mA - Modem Sleep: ~20mA - Light Sleep: ~2mA - Deep Sleep: ~0.02mA | |
|
64 | +| Security | WEP/WPA-PSK/WPA2-PSK | |
|
65 | +| Power Supply Voltage | 3.0V ~ 3.6VˈTypical 3.3VˈCurrent >500mA | |
|
66 | +| Operating Temperature | -20 C ~ 85 C | |
|
67 | +| Storage Environment | -40 C ~ 85 C , < 90%RH | |
|
68 | + |
|
69 | + |
|
70 | + |
|
71 | +## Pin Definition |
|
72 | + |
|
73 | +![](2023-10-30-16-33-38.png) |
|
74 | + |
|
75 | +| No. | Pin Name | Functional Description | |
|
76 | +| --- | -------- | ------------------------------------------------------------------- | |
|
77 | +| 1 | RST | Reset Pin, Active Low | |
|
78 | +| 2 | ADC | AD conversion, Input voltage range 0~1V, the value range is 0~1024. | |
|
79 | +| 3 | EN | Chip Enabled Pin, Active High | |
|
80 | +| 4 | IO16 | Connect with RST pin to wake up Deep Sleep | |
|
81 | +| 5 | IO14 | GPIO14; HSPI_CLK | |
|
82 | +| 6 | IO12 | GPIO12; HSPI_MISO | |
|
83 | +| 7 | IO13 | GPIO13; HSPI_MOSI; UART0_CTS | |
|
84 | +| 8 | VCC | Module power supply pin, Voltage 3.0V ~ 3.6V | |
|
85 | +| 9 | GND | GND | |
|
86 | +| 10 | IO15 | GPIO15; MTDO; HSPICS; UART0_RTS | |
|
87 | +| 11 | IO2 | GPIO2; UART1_TXD | |
|
88 | +| 12 | IO0 | GPIO0;HSPI_MISO;I2SI_DATA | |
|
89 | +| 13 | IO4 | GPIO4 | |
|
90 | +| 14 | IO5 | GPIO5;IR_R | |
|
91 | +| 15 | RXD | UART0_RXD; GPIO3 | |
|
92 | +| 16 | TXD | UART0_TXD; GPIO1 | |
|
93 | + |
|
94 | + |
|
95 | +## Boot Mode |
|
96 | + |
|
97 | +Description of the ESP series module boot mode |
|
98 | + |
|
99 | +| Mode | CH_PD(EN) | RST | GPIO15 | GPIO0 | GPIO2 | TXD0 | |
|
100 | +| ------------- | --------- | ---- | ------ | ----- | ----- | ---- | |
|
101 | +| Download mode | high | high | low | low | high | high | |
|
102 | +| Running mode | high | high | low | high | high | high | |
|
103 | + |
|
104 | +- Notes: Some of the pins inside the module have been pulled or pulled down, please |
|
105 | + refer to the schematic diagram. |
|
106 | + |
|
107 | +## reflow profile |
|
108 | + |
|
109 | +![](2023-10-30-16-37-34.png) |
|
110 | + |
|
111 | + |
|
112 | +## peripheral schematic |
|
113 | + |
|
114 | +Application circuit |
|
115 | + |
|
116 | + |
|
117 | +- CHPD - pull up |
|
118 | +- IO2 - pull up |
|
119 | +- IO0 - pull up - press down button |
|
120 | +- IO15 - pull down |
|
121 | +- Reset - press down button |
|
122 | +- ADC -voltage divider ladder |
|
123 | + |
|
124 | +![](2023-10-30-16-38-11.png) |
|
125 | + |
|
126 | +![](2023-10-30-16-21-51.png) |
|
127 | + |
|
128 | +## SCH |
|
129 | + |
|
130 | +![](2023-10-30-16-40-03.png) |
|
131 | +![](2023-10-30-16-23-39.png) |
|
132 | + |
Chip-cn-dat/AIT/ESP-12F-DAT/esp-12f_product_specification_en.pdf
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Chip-cn-dat/AIT/ESP-12S-DAT/ESP-12S-DAT.md
... | ... | @@ -7,14 +7,12 @@ |
7 | 7 | |
8 | 8 | ## internal |
9 | 9 | |
10 | - |
|
11 | - |
|
12 | -- reset - internal pull-up + cap |
|
13 | -- en - internal pull-up |
|
14 | - |
|
15 | -- IO0 - internal pull-up |
|
16 | -- IO2 - internal pull-up, with on board LED |
|
17 | -- |
|
18 | -- IO15 - internal pull-down |
|
10 | +| pins | internal | Extra | |
|
11 | +| ----- | --------- | ---------------- | |
|
12 | +| reset | pull-up | extra filter cap | |
|
13 | +| en | pull-up | | |
|
14 | +| IO0 | pull-up | | |
|
15 | +| IO2 | pull-up | on board LED | |
|
16 | +| IO15 | pull-down | | |
|
19 | 17 | |
20 | 18 | ![](56-45-15-16-12-2022.png) |
... | ... | \ No newline at end of file |
Chip-cn-dat/AIT/ESP-C3-12F-DAT/ESP-C3-12F-DAT.md
... | ... | @@ -2,8 +2,6 @@ |
2 | 2 | # ESP-C3-12F-DAT |
3 | 3 | |
4 | 4 | |
5 | -- [[ESP-C3-12F-DAT]] |
|
6 | - |
|
7 | 5 | ![](42-54-17-15-12-2022.png) |
8 | 6 | |
9 | 7 | ![](2023-11-28-15-28-19.png) |
... | ... | @@ -38,4 +36,6 @@ |
38 | 36 | |
39 | 37 | ## ref |
40 | 38 | |
41 | -- [[ESP32-C3-dat]] |
|
... | ... | \ No newline at end of file |
0 | +- [[ESP32-C3-dat]] |
|
1 | + |
|
2 | +- [[ESP-C3-12F-DAT]] - [[ESP-C3-12F]] |
|
... | ... | \ No newline at end of file |
Chip-cn-dat/Espressif/ESP32/ESP32-C3-dat/ESP32-C3-DAT.md
... | ... | @@ -36,20 +36,20 @@ |
36 | 36 | |
37 | 37 | - [[ESP32-C3-DAT]] |
38 | 38 | |
39 | -- [[NWI1239-dat]] |
|
40 | -- [[ESP32-C3-WROOM-02-DAT]] |
|
39 | +- [[NWI1239-dat]] - [[ESP32-C3-WROOM-02-DAT]] |
|
41 | 40 | - https://w2.electrodragon.com/gollum/search?q=ESP32-C3-WROOM-02-DAT.md |
42 | 41 | |
43 | 42 | |
44 | - |
|
45 | 43 | - [[ESP32-C3-Mini-1-DAT]] |
46 | 44 | |
47 | - |
|
48 | - |
|
49 | 45 | - [[ESP-C3-32S-dat]] |
50 | 46 | |
51 | 47 | - [[ESP-C3-12F-dat]] |
52 | 48 | |
49 | +| models | lifetime | Compatible | |
|
50 | +|-|-|-| |
|
51 | +| [[ESP-C3-12F-dat]] | x | [[ESP-12f-dat]] |
|
52 | + |
|
53 | 53 | products - |
54 | 54 | - [[NWI1126-DAT]] |
55 | 55 |
Chip-cn-dat/Espressif/ESP8266-DAT/ESP8266-DAT.md
... | ... | @@ -2,6 +2,8 @@ |
2 | 2 | # ESP8266 |
3 | 3 | |
4 | 4 | |
5 | +- [[esp-modules-dat]] |
|
6 | + |
|
5 | 7 | ### common pins |
6 | 8 | |
7 | 9 | |
... | ... | @@ -26,7 +28,10 @@ serial1 = |
26 | 28 | |
27 | 29 | |
28 | 30 | ## Modules |
31 | + |
|
29 | 32 | - [[ESP-01-DAT]] - [[ESP-07S-DAT]] - [[ESP-12F-DAT]] - [[ESP-12S-DAT]] |
30 | 33 | |
34 | +Sell - [[NWI1059-dat]] - [[NWI1086-dat]] |
|
35 | + |
|
31 | 36 | ## ref |
32 | 37 | - [[ESP8266]] |
... | ... | \ No newline at end of file |