Board-dat/NWI/NWI1243-dat/NWI1243-dat.md
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@@ -7,12 +7,12 @@
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![](2023-12-01-15-32-49.png)
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-- main module ESP32-S3-WROOM-1-N8R2
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+- main module ESP32-S3-WROOM-1-N8R2 = [[ESP32-S3-WROOM-1]]
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- pins = 2x21 = 42 pins
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- available GPIOs = 42 - 6 = 36 pins
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-
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+- schematic see here: [[ESP32-S3-Board-DAT]]
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## ref
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Chip-cn-dat/Espressif-dat/ESP32-dat/ESP32-S3-DAT/ESP32-S3-Board-DAT/2025-01-06-16-06-22.png
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Chip-cn-dat/Espressif-dat/ESP32-dat/ESP32-S3-DAT/ESP32-S3-Board-DAT/2025-01-06-16-07-21.png
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Chip-cn-dat/Espressif-dat/ESP32-dat/ESP32-S3-DAT/ESP32-S3-Board-DAT/2025-01-06-16-11-53.png
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Chip-cn-dat/Espressif-dat/ESP32-dat/ESP32-S3-DAT/ESP32-S3-Board-DAT/ESP32-S3-Board-DAT.md
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## Cloned Core Board SCH
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+- [[NWI1243-dat]]
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+
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![](2025-01-06-15-26-25.png)
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## Cloned Core Board SCH with CAM
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![](2025-01-06-15-50-00.png)
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+
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+
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## dev board
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- [[NWI1243-dat]]
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### official ESP32-S3-DevKitM-1
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+![](2025-01-06-16-06-22.png)
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+
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+
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![](2023-12-01-15-32-07.png)
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- pin = 2x22 = 44 pins
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- available GPIOs = 44 - 5 = 39 pins
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+### official ESP32-S3-DevKitC-1
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+
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+https://docs.espressif.com/projects/esp-dev-kits/en/latest/esp32s3/esp32-s3-devkitc-1/index.html
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+
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+
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+![](2025-01-06-16-07-21.png)
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+
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+
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+## Other DEV board for reference
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+
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+![](2025-01-06-16-11-53.png)
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+
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+
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+
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+## ref
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+
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+- [[Arduino-ESP32-dat]]
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\ No newline at end of file
Chip-dat/Analog-dat/MAX98357-dat/2025-01-06-15-56-23.png
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Chip-dat/Analog-dat/MAX98357-dat/MAX98357-dat.md
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## Pins
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-- LRC: Left/right clock synchronization clock for I2S and LJ modes for TDM mode
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-- BCLK: Bit clock input
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-- DIN: Digital input signal
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-- GAIN: Gain and channel selection In TDM mode, the gain is fixed at 12dB
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-- SD: Shutdown and channel selection. SD_MODE is pulled low to put the device in shutdown state
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-- GND: Power ground
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-- VCC: Power positive, DC2.5V-5.5V
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+- [[I2S-dat]]
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+
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+| Pin | ESP32 | ESP32-S3 | Note |
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+| ---- | ----- | -------- | ----------------------------------------------------------------------------------------- |
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+| LRC | 25 | 11 | Left/right clock synchronization clock for I2S and LJ modes for TDM mode |
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+| BCLK | 5 | 12 | Bit clock input |
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+| DIN | 26 | 13 | Digital input signal |
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+| GAIN | | | Gain and channel selection In TDM mode, the gain is fixed at 12dB |
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+| SD | | | Shutdown and channel selection. SD_MODE is pulled low to put the device in shutdown state |
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+| GND | | | Power ground |
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+| VCC | | | Power positive, DC2.5V-5.5V |
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+
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+- better use [[ESP32-S3-board-dat]] = i2s.setPins(12, 11, 13, -1, -1);
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+
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+- [[arduino-ESP32-dat]]
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## wiring
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![](2024-12-26-19-06-13.png)
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+## Use with ESP32-S3
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+
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+- better use [[ESP32-S3-board-dat]]
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+- pull SD high to use
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+- IO17
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+- IO16
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+- IO15
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+
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+![](2025-01-06-15-56-23.png)
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+
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+
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+
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## Dimension
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![](2025-01-06-14-15-26.png)
SDK-dat/arduino-dat/Arduino-IDE-DAT/Arduino-ESP32-dat/arduino-esp32-dat.md
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@@ -53,6 +53,32 @@ some tips:
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- 80Mhz + 40Mhz + QIO = OK
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- 80Mhz + 40Mhz + DIO = OK
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+
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+## ESP32-S3
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+
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+- [[ESP32-S3-dat]], below is a common setup for uploading via type-c
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+
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+Board: “ESP32S3 Dev Module"
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+Upload Speed: “921600"
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+USB Mode: "Hardware CDC and JTAG"
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+USB CDC On Boot: "Disabled"
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+USB Firmware MSC On Boot:“Disabled"
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+USB DFU On Boot: “Disabled"
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+Upload Mode: "USB-OTG CDC (TinyUSB)
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+CPU Frequency: "240MHz (WiFi)"
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+Flash Mode: "QIO 80MHz"
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+Flash Size: “4MB (32Mb)"
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+Partition Scheme: “Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS)"
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+Core Debug Level: "None"
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+PSRAM: *Disabled"
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+Arduino Runs On: “Core 1"
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+Events Run On: "Core 1"
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+Erase All Flash Before Sketch Upload: "Disabled"
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+JTAG Adapter: “Disabled"
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+Zigbee Mode: "Disabled"
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+Port: "COM252 (Electrodragon)
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+Get Board Info
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+
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## version
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version 2.0.6 - 2022/2/3