73e938f43f27943dbcf51954399d4af3092c4a98
Board-dat/IDD/IDD1013-DAT/2026-01-12-15-07-47.png
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Board-dat/IDD/IDD1013-DAT/IDD1013-DAT.md
| ... | ... | @@ -1,5 +1,5 @@ |
| 1 | 1 | |
| 2 | -# IDD1013 DAT |
|
| 2 | +# IDD1013-DAT |
|
| 3 | 3 | |
| 4 | 4 | |
| 5 | 5 | ## info |
| ... | ... | @@ -30,7 +30,9 @@ Old V1 version: |
| 30 | 30 | - Please notice for devkitc, CLK = IO16, D = IO17 |
| 31 | 31 | - Please notice for PCIO, CLK = 32, D = 33 |
| 32 | 32 | |
| 33 | +jumper set on the diode |
|
| 33 | 34 | |
| 35 | + |
|
| 34 | 36 | |
| 35 | 37 | |
| 36 | 38 | ### DEVKITC Board pin definitions |
Chip-dat/Analog-device-dat/AD-LDO-dat/AD-LDO-dat.md
| ... | ... | @@ -6,7 +6,7 @@ ADP3339AKCZ-1.8-RL - IC REG LIN 1.8V 1.5A SOT-223-3 -Linear Voltage Regulator IC |
| 6 | 6 | - LT1763 Series - 500mA, Low Noise, LDO Micropower Regulators |
| 7 | 7 | |
| 8 | 8 | |
| 9 | - |
|
| 9 | +HMC976LP3E - 400mA LOW NOISE, HIGH PSRR LINEAR VOLTAGE REGULATOR |
|
| 10 | 10 | |
| 11 | 11 | |
| 12 | 12 | ## ref |
Circuits-dat/circuits-dat.md
| ... | ... | @@ -52,12 +52,13 @@ |
| 52 | 52 | |
| 53 | 53 | - [[switching-dat]] |
| 54 | 54 | |
| 55 | -- [[amplifier-dat]] |
|
| 55 | +- [[amplifier-dat]] - [[op-amp-dat]] |
|
| 56 | 56 | |
| 57 | 57 | - [[LNA-dat]] |
| 58 | 58 | |
| 59 | 59 | - [[digital-dat]] |
| 60 | 60 | |
| 61 | +- [[frequency-dat]] |
|
| 61 | 62 | |
| 62 | 63 | ## repo |
| 63 | 64 |
Home.md
| ... | ... | @@ -17,7 +17,7 @@ |
| 17 | 17 | |
| 18 | 18 | - [[chip-dat]] - [[chip-cn-dat]] |
| 19 | 19 | |
| 20 | -- [[Tech-DAT]] - [[display-dat]] - [[interactive-dat]] - [[sensor-dat]] - [[acturator-dat]] - [[cable-dat]] |
|
| 20 | +- [[Tech-DAT]] - [[display-dat]] - [[interactive-dat]] - [[sensor-dat]] - [[acturator-dat]] - [[cable-dat]] - [[circuits-dat]] |
|
| 21 | 21 | |
| 22 | 22 | - [[power-dat]] - [[battery-dat]] - [[BMS-dat]] - [[ldo-dat]] - [[dcdc-down-dat]] - [[battery-pack-dat]] - [[dcdc-boost-dat]] - [[acdc-dat]] |
| 23 | 23 |
Network-dat/frequency-dat/PLL-dat/PLL-dat.md
| ... | ... | @@ -0,0 +1,69 @@ |
| 1 | + |
|
| 2 | +# PLL-dat |
|
| 3 | + |
|
| 4 | +HMC830LP6GE - Fractional-N PLL with Integrated VCO 25 - 3000 MHz |
|
| 5 | + |
|
| 6 | +The HMC830LP6GE is a low noise, wide band, Fractional-N Phase-Locked-Loop (PLL) that features an integrated |
|
| 7 | +Voltage Controlled Oscillator (VCO) with a fundamental frequency of 1500 MHz - 3000 MHz, and an integrated VCO |
|
| 8 | +Output Divider (divide by 1/2/4/6.../60/62), that together allow the HMC830LP6GE to generate frequencies from |
|
| 9 | +25 MHz to 3000 MHz. |
|
| 10 | + |
|
| 11 | + |
|
| 12 | + |
|
| 13 | + |
|
| 14 | +A **Phase-Locked Loop (PLL)** is an **electronic control system** that automatically **locks the phase and frequency** of a generated signal to a reference signal. |
|
| 15 | + |
|
| 16 | +--- |
|
| 17 | + |
|
| 18 | +## Core Purpose |
|
| 19 | +- Generate a **stable frequency** |
|
| 20 | +- Synchronize signals |
|
| 21 | +- Multiply or divide frequencies |
|
| 22 | +- Reduce clock jitter |
|
| 23 | + |
|
| 24 | +--- |
|
| 25 | + |
|
| 26 | +## Main Blocks of a PLL |
|
| 27 | + |
|
| 28 | +1. **Phase Detector (PD)** |
|
| 29 | + Compares the phase of the reference signal and feedback signal |
|
| 30 | + |
|
| 31 | +2. **Loop Filter (LF)** |
|
| 32 | + Smooths the phase error signal |
|
| 33 | + |
|
| 34 | +3. **Voltage-Controlled Oscillator (VCO)** |
|
| 35 | + Adjusts output frequency based on control voltage |
|
| 36 | + |
|
| 37 | +4. **Feedback Divider (optional)** |
|
| 38 | + Scales output frequency for comparison |
|
| 39 | + |
|
| 40 | +--- |
|
| 41 | + |
|
| 42 | +## How It Works (Simple) |
|
| 43 | + |
|
| 44 | + Reference Clock → Phase Detector → Loop Filter → VCO → Output |
|
| 45 | + ↑__________________________| |
|
| 46 | + |
|
| 47 | + |
|
| 48 | +- If output phase ≠ reference phase → correction applied |
|
| 49 | +- Loop continues until **phase lock** is achieved |
|
| 50 | + |
|
| 51 | +--- |
|
| 52 | + |
|
| 53 | +## Key Characteristics |
|
| 54 | +- **Lock Range**: frequencies the PLL can stay locked |
|
| 55 | +- **Capture Range**: frequencies it can initially lock onto |
|
| 56 | +- **Jitter**: short-term timing variations |
|
| 57 | + |
|
| 58 | +--- |
|
| 59 | + |
|
| 60 | +## Common Applications |
|
| 61 | +- Clock generation in CPUs & MCUs |
|
| 62 | +- Frequency synthesis (RF systems) |
|
| 63 | +- Data recovery (USB, Ethernet) |
|
| 64 | +- Motor control and communication systems |
|
| 65 | + |
|
| 66 | +--- |
|
| 67 | + |
|
| 68 | +## In One Line |
|
| 69 | +> **PLL keeps an oscillator perfectly synchronized with a reference signal** |
|
| ... | ... | \ No newline at end of file |
Network-dat/frequency-dat/frequency-dat.md
| ... | ... | @@ -1,6 +1,8 @@ |
| 1 | 1 | |
| 2 | 2 | # frequency-dat |
| 3 | 3 | |
| 4 | +- [[PPL-dat]] - [[PLL-dat]] |
|
| 5 | + |
|
| 4 | 6 | China has several ISM (Industrial, Scientific, and Medical) bands available for low-power, short-range devices. The primary bands are: |
| 5 | 7 | |
| 6 | 8 | - 470-510 MHz: This is the main band designated for LoRaWAN and other LPWAN technologies in China. |
| ... | ... | @@ -63,6 +65,26 @@ Most clothing stores use: |
| 63 | 65 | - **UHF RFID (860–960 MHz)** for inventory tracking |
| 64 | 66 | |
| 65 | 67 | |
| 68 | + |
|
| 69 | + |
|
| 70 | +## frequency operator |
|
| 71 | + |
|
| 72 | +HMC189AMS8E - Signal Conditioning Passive SMT Freq. Doubler, 2 - 4 GHz |
|
| 73 | + |
|
| 74 | +HMC443LP4 / 443LP4E - The HMC443LP4 & HMC443LP4E are active miniature x4 frequency multipliers utilizing InGaP GaAs HBT technology in 4x4 mm leadless surface mount packages. |
|
| 75 | + |
|
| 76 | +## PLL Frequency Synthesizer |
|
| 77 | + |
|
| 78 | +AD4106 |
|
| 79 | + |
|
| 80 | + |
|
| 81 | +## frequency multipiler |
|
| 82 | + |
|
| 83 | +HMC443LP4 / 443LP4E - SMT GaAs HBT MMIC x4 ACTIVE FREQUENCY MULTIPLIER, 9.8 - 11.2 GHz OUTPUT |
|
| 84 | + |
|
| 85 | + |
|
| 86 | + |
|
| 87 | + |
|
| 66 | 88 | ## ref |
| 67 | 89 | |
| 68 | 90 | - [[RF-dat]] |
| ... | ... | \ No newline at end of file |
Tech-dat/acturator-dat/switching-dat/switching-dat.md
| ... | ... | @@ -6,6 +6,7 @@ |
| 6 | 6 | |
| 7 | 7 | [[ACDC-dat]] + [[speed-controller-dat]] + [[dc-gear-motor-dat]] |
| 8 | 8 | |
| 9 | +- [[switching-rf-dat]] |
|
| 9 | 10 | |
| 10 | 11 |  |
| 11 | 12 |
Tech-dat/acturator-dat/switching-dat/switching-rf-dat/switching-rf-dat.md
| ... | ... | @@ -8,6 +8,9 @@ The ADRF5019 is a nonreflective, single pole, double throw (SPDT) RF switch manu |
| 8 | 8 | The ADRF5019 operates from 100 MHz to 13 GHz with better than 0.8 dB insertion loss and 45 dB of isolation at 8 GHz. The ADRF5019 has a nonreflective design, and the RF ports are internally terminated to 50 Ω. |
| 9 | 9 | |
| 10 | 10 | |
| 11 | +HMC241AQS16 - RF Switch ICs GaAs MMIC SP4T Non-Reflective Switch, DC - 3.5 GHz |
|
| 12 | + |
|
| 13 | + |
|
| 11 | 14 | |
| 12 | 15 | ## ref |
| 13 | 16 |
Tech-dat/amplifier-dat/op-amp-dat/op-amp-dat.md
| ... | ... | @@ -35,7 +35,7 @@ AD8313 ARMZ - 0.1 GHz to 2.5 GHz 70 dB Logarithmic Detector/Controller |
| 35 | 35 | |
| 36 | 36 | ADL8150ACPZN - IC AMPLIFIER 6-14GHz 6LFCSP |
| 37 | 37 | |
| 38 | - |
|
| 38 | +OP27 - Low Noise, Precision Operational Amplifier |
|
| 39 | 39 | |
| 40 | 40 | ## ref |
| 41 | 41 |
power-dat/LDO-dat/LDO-dat.md
| ... | ... | @@ -96,6 +96,8 @@ SOT23-5 |
| 96 | 96 |  |
| 97 | 97 | |
| 98 | 98 | |
| 99 | +HMC860LP3E - QUAD LOW NOISE HIGH PSRR LINEAR VOLTAGE REGULATOR |
|
| 100 | + |
|
| 99 | 101 | ## others |
| 100 | 102 | |
| 101 | 103 | |
| ... | ... | @@ -125,6 +127,9 @@ LM109,LM309 == LM109/LM309 5-Volt Regulator |
| 125 | 127 | |
| 126 | 128 | MAX1735 - 200mA, Negative-Output, Low-Dropout Linear Regulator in SOT23 |
| 127 | 129 | |
| 130 | + |
|
| 131 | + |
|
| 132 | + |
|
| 128 | 133 | ## maker |
| 129 | 134 | |
| 130 | 135 | - [[maxlinear-dat]] |
power-dat/power-amplifier-dat/power-amplifier-dat.md
| ... | ... | @@ -0,0 +1,4 @@ |
| 1 | + |
|
| 2 | +# power-amplifier-dat |
|
| 3 | + |
|
| 4 | +MC441LP3 / 441LP3E - GaAs pHEMT MMIC MEDIUM POWER AMPLIFIER, 6.5 - 13.5 GHz |
|
| ... | ... | \ No newline at end of file |
power-dat/power-dat.md
| ... | ... | @@ -33,7 +33,7 @@ |
| 33 | 33 | |
| 34 | 34 | - [[constant-current-dat]] |
| 35 | 35 | |
| 36 | -- [[power-detector-dat]] |
|
| 36 | +- [[power-detector-dat]] - [[power-amplifier-dat]] |
|
| 37 | 37 | |
| 38 | 38 | ## power design workflow |
| 39 | 39 |
power-dat/power-detector-dat/power-detector-dat.md
| ... | ... | @@ -1,4 +1,6 @@ |
| 1 | 1 | |
| 2 | 2 | # power-detector-dat |
| 3 | 3 | |
| 4 | -LTC5564 - UltraFast™ 7ns Response Time 15GHz RF Power Detector with Comparator |
|
| ... | ... | \ No newline at end of file |
| 0 | +LTC5564 - UltraFast™ 7ns Response Time 15GHz RF Power Detector with Comparator |
|
| 1 | + |
|
| 2 | +AD8318 - 1 MHz TO 8 GHz, 70 dB Logarithmic Detector/Controller - |
|
| ... | ... | \ No newline at end of file |