Board-dat/SDR/SDR1064-dat/SDR1064-dat.md
... ...
@@ -113,5 +113,8 @@ It is not simple to setup the WiFiCar with the provided software. You should hav
113 113
114 114
- [[L293-dat]] - [[dc-motor-dat]] - [[wifi-dat]] - [[rover-dat]]
115 115
116
+- [[logic-dat]]
117
+
118
+
116 119
- [legacy wiki page ](https://www.electrodragon.com/w/WifiCar)
117 120
... ...
\ No newline at end of file
Chip-cn-dat/STC-dat/2024-10-27-13-36-15.png
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Chip-cn-dat/STC-dat/STC-STC15.pdf
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Chip-cn-dat/STC-dat/STC-dat.md
... ...
@@ -0,0 +1,51 @@
1
+
2
+# STC-dat.md
3
+
4
+- [[CIC1057-dat]] - STC15F104W SOP-8 MCU == 1.2.STC15F100W系列单片机总体介绍(B版大批量现货供应中)
5
+
6
+
7
+
8
+
9
+STC8G1K08A-36I-DFN8
10
+
11
+## STC12
12
+
13
+STK12C68
14
+STK12C68
15
+STK12C68
16
+
17
+## STC15
18
+
19
+- [[STC-STC15.pdf]] (very large file, better download to view)
20
+
21
+
22
+### STC15W100, STC15F100 series
23
+
24
+![](2024-10-27-13-36-15.png)
25
+
26
+![](2025-07-15-12-34-22.png)
27
+
28
+
29
+## APP
30
+
31
+- [[SCU1047-dat]]
32
+
33
+## repo
34
+
35
+- https://github.com/Edragon/STC
36
+
37
+## SDK
38
+
39
+STC ISP programming software (v6.95U)
40
+
41
+install keil header files
42
+
43
+![](2025-07-13-20-50-41.png)
44
+
45
+- [[Keil-C51-dat]]
46
+
47
+
48
+
49
+## ref
50
+
51
+- [[MCU-dat]]
... ...
\ No newline at end of file
Chip-dat/STC-dat/2024-10-27-13-36-15.png
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Chip-dat/STC-dat/2025-07-13-20-50-41.png
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Chip-dat/STC-dat/2025-07-15-12-34-22.png
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Chip-dat/STC-dat/STC-STC15.pdf
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Chip-dat/STC-dat/STC-dat.md
... ...
@@ -1,43 +0,0 @@
1
-
2
-# STC-dat.md
3
-
4
-- [[CIC1057-dat]] - STC15F104W SOP-8 MCU == 1.2.STC15F100W系列单片机总体介绍(B版大批量现货供应中)
5
-
6
-
7
-
8
-- [[STC-STC15.pdf]] (very large file, better download to view)
9
-
10
-STC8G1K08A-36I-DFN8
11
-
12
-
13
-
14
-## STC15W100, STC15F100 series
15
-
16
-![](2024-10-27-13-36-15.png)
17
-
18
-![](2025-07-15-12-34-22.png)
19
-
20
-
21
-## APP
22
-
23
-- [[SCU1047-dat]]
24
-
25
-## repo
26
-
27
-- https://github.com/Edragon/STC
28
-
29
-## SDK
30
-
31
-STC ISP programming software (v6.95U)
32
-
33
-install keil header files
34
-
35
-![](2025-07-13-20-50-41.png)
36
-
37
-- [[Keil-C51-dat]]
38
-
39
-
40
-
41
-## ref
42
-
43
-- [[MCU-dat]]
... ...
\ No newline at end of file
Circuits-dat/logic-gate-dat/2024-07-08-18-34-43.png
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Circuits-dat/logic-gate-dat/Buffer-dat/2024-01-18-18-16-22.png
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Circuits-dat/logic-gate-dat/Buffer-dat/2024-01-18-18-19-39.png
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Circuits-dat/logic-gate-dat/Buffer-dat/buffer-dat.md
... ...
@@ -1,67 +0,0 @@
1
-
2
-# buffer-dat
3
-
4
-- [[octal-buffer]] - [[shift-register]]
5
-
6
-## common used
7
-
8
-- [[74HC245-dat]] - [[74HCT245-dat]]
9
-
10
-- [[CD4050-dat]]
11
-
12
-
13
-| Specification | CD4050 | 74HC245 |
14
-|----------------------------|----------------------------------|----------------------------------|
15
-| Function | Hex buffer (non-inverting) | Octal bus transceiver (bi-directional) |
16
-| Logic Family | CMOS (CD4000 series) | HC (High-speed CMOS) |
17
-| Number of Buffers | 6 (hex) | 8 (octal) |
18
-| Direction Control | Unidirectional | Bi-directional with direction control |
19
-| Voltage Range | 3V to 15V | 2V to 6V |
20
-| Typical Operating Voltage | 5V, 10V, 15V | 5V |
21
-| Input Voltage Tolerance | Up to 15V | Vcc + 0.5V (max) |
22
-| Input Type | TTL/CMOS | CMOS/TTL compatible |
23
-| Output Drive Capability | Moderate | High (up to ±35mA sink/source) |
24
-| Output Type | CMOS push-pull | CMOS push-pull |
25
-| Propagation Delay (at 5V) | ~200 ns | ~8 ns |
26
-| Package Types | DIP, SOIC, etc. | DIP, SOIC, etc. |
27
-| Use Case | Level shifting (e.g. 5V to 3.3V) | Bus interfacing, data buffering |
28
-
29
-
30
-Summary:
31
-
32
-**CD4050** is ideal for **level shifting **and operates over a wide voltage range. It is tolerant of high-voltage inputs.
33
-
34
-**74HC245** is a high-speed **bi-directional bus buffer**, typically used for **bus-oriented communication** and interfacing between microcontrollers and peripherals.
35
-
36
-
37
-## SINGLE BUFFER/DRIVER WITH OPEN DRAIN OUTPUT
38
-
39
-74LVC1G07
40
-
41
-![](2024-01-18-18-16-22.png)
42
-
43
-
44
-## SINGLE SCHMITT-TRIGGER INVERETER
45
-
46
-74AHC1G14
47
-
48
-![](2024-01-18-18-19-39.png)
49
-
50
-
51
-
52
-## SINGLE BUFFER GATE WITH 3-STATE OUTPUT
53
-
54
-
55
-## SN74LVC2G04 Dual Inverter Gate
56
-
57
-
58
-# buffer-dat
59
-
60
-
61
-- SN74LVC1G07 Single Buffer/Driver With Open-Drain Output
62
-
63
-## Inverter
64
-
65
-SN74LVC1G14 Single Schmitt-Trigger Inverter - https://www.ti.com/lit/ds/symlink/sn74lvc1g14.pdf
66
-
67
-- [[74hc541-dat]] - [[74hct245-dat]]
... ...
\ No newline at end of file
Circuits-dat/logic-gate-dat/Buffer-dat/octal-buffer/2023-09-28-17-16-40.png
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Circuits-dat/logic-gate-dat/Buffer-dat/octal-buffer/octal-buffer.md
... ...
@@ -1,11 +0,0 @@
1
-
2
-# octal buffer
3
-
4
-SN74AC573 Octal D-type Transparent Latches with 3-State Outputs
5
-
6
-- SN74AC573
7
-- rise/fall time of about 10ns
8
-
9
-
10
-![](2023-09-28-17-16-40.png)
11
-
Circuits-dat/logic-gate-dat/logic-gate-dat.md
... ...
@@ -1,28 +0,0 @@
1
-
2
-# logic gate
3
-
4
-
5
-## 74AHC1G125
6
-
7
-https://www.diodes.com/assets/Datasheets/74AHC1G125.pdf
8
-
9
-| OE | A | Y |
10
-| --- | --- | --- |
11
-| L | H | H |
12
-| L | L | L |
13
-| H | X | Z |
14
-
15
-The output enters a high impedance state when a HIGH-level is applied to the output enable (OE) pin.
16
-
17
-
18
-## NAND
19
-
20
-### NC7SZ00
21
-
22
-
23
-The NC7SZ00 is a single two−input NAND gate from onsemi’s Ultra−High Speed (UHS) series of TinyLogic.
24
-
25
-![](2024-07-08-18-34-43.png)
26
-
27
-
28
-
Circuits-dat/logic-gate-dat/logic-inverter-dat/2025-03-25-15-51-07.png
... ...
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Circuits-dat/logic-gate-dat/logic-inverter-dat/logic-inverter-dat.md
... ...
@@ -1,18 +0,0 @@
1
-
2
-# inverter-dat
3
-
4
-- 74HC14D
5
-
6
-## SN74LVC2G04 Dual Inverter Gate
7
-
8
-![](2025-03-25-15-51-07.png)
9
-
10
-https://www.ti.com/lit/ds/symlink/sn74lvc2g04.pdf
11
-
12
-
13
-Table 1. Function Table (Each Inverter)
14
-
15
-| INPUT (A) | OUTPUT (Y) |
16
-| --------- | ---------- |
17
-| H | L |
18
-| L | H |
Circuits-dat/logic-gate-dat/shift-register-dat/shift-register-dat.md
... ...
@@ -1,11 +0,0 @@
1
-
2
-# shift-register
3
-
4
-74HC595
5
-
6
-8-BIT SHIFT REGISTER WITH 8-BIT OUTPUT REGISTER
7
-
8
-
9
-74HC165; 74HCT165
10
-
11
-8-bit parallel-in/serial out shift register
... ...
\ No newline at end of file
Tech-dat/logic-dat/logic-dat.md
... ...
@@ -12,6 +12,9 @@
12 12
13 13
- [[XOR-dat]]
14 14
15
+- [[logic-gate-dat]] - [[shift-register-dat]] - [[buffer-dat]] - [[logic-inverter-dat]]
16
+
17
+
15 18
16 19
## ref
17 20
Tech-dat/logic-dat/logic-gate-dat/2024-07-08-18-34-43.png
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Tech-dat/logic-dat/logic-gate-dat/Buffer-dat/2024-01-18-18-16-22.png
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Tech-dat/logic-dat/logic-gate-dat/Buffer-dat/2024-01-18-18-19-39.png
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Tech-dat/logic-dat/logic-gate-dat/Buffer-dat/buffer-dat.md
... ...
@@ -0,0 +1,67 @@
1
+
2
+# buffer-dat
3
+
4
+- [[octal-buffer]] - [[shift-register]]
5
+
6
+## common used
7
+
8
+- [[74HC245-dat]] - [[74HCT245-dat]]
9
+
10
+- [[CD4050-dat]]
11
+
12
+
13
+| Specification | CD4050 | 74HC245 |
14
+|----------------------------|----------------------------------|----------------------------------|
15
+| Function | Hex buffer (non-inverting) | Octal bus transceiver (bi-directional) |
16
+| Logic Family | CMOS (CD4000 series) | HC (High-speed CMOS) |
17
+| Number of Buffers | 6 (hex) | 8 (octal) |
18
+| Direction Control | Unidirectional | Bi-directional with direction control |
19
+| Voltage Range | 3V to 15V | 2V to 6V |
20
+| Typical Operating Voltage | 5V, 10V, 15V | 5V |
21
+| Input Voltage Tolerance | Up to 15V | Vcc + 0.5V (max) |
22
+| Input Type | TTL/CMOS | CMOS/TTL compatible |
23
+| Output Drive Capability | Moderate | High (up to ±35mA sink/source) |
24
+| Output Type | CMOS push-pull | CMOS push-pull |
25
+| Propagation Delay (at 5V) | ~200 ns | ~8 ns |
26
+| Package Types | DIP, SOIC, etc. | DIP, SOIC, etc. |
27
+| Use Case | Level shifting (e.g. 5V to 3.3V) | Bus interfacing, data buffering |
28
+
29
+
30
+Summary:
31
+
32
+**CD4050** is ideal for **level shifting **and operates over a wide voltage range. It is tolerant of high-voltage inputs.
33
+
34
+**74HC245** is a high-speed **bi-directional bus buffer**, typically used for **bus-oriented communication** and interfacing between microcontrollers and peripherals.
35
+
36
+
37
+## SINGLE BUFFER/DRIVER WITH OPEN DRAIN OUTPUT
38
+
39
+74LVC1G07
40
+
41
+![](2024-01-18-18-16-22.png)
42
+
43
+
44
+## SINGLE SCHMITT-TRIGGER INVERETER
45
+
46
+74AHC1G14
47
+
48
+![](2024-01-18-18-19-39.png)
49
+
50
+
51
+
52
+## SINGLE BUFFER GATE WITH 3-STATE OUTPUT
53
+
54
+
55
+## SN74LVC2G04 Dual Inverter Gate
56
+
57
+
58
+# buffer-dat
59
+
60
+
61
+- SN74LVC1G07 Single Buffer/Driver With Open-Drain Output
62
+
63
+## Inverter
64
+
65
+SN74LVC1G14 Single Schmitt-Trigger Inverter - https://www.ti.com/lit/ds/symlink/sn74lvc1g14.pdf
66
+
67
+- [[74hc541-dat]] - [[74hct245-dat]]
... ...
\ No newline at end of file
Tech-dat/logic-dat/logic-gate-dat/Buffer-dat/octal-buffer/2023-09-28-17-16-40.png
... ...
Binary files /dev/null and b/Tech-dat/logic-dat/logic-gate-dat/Buffer-dat/octal-buffer/2023-09-28-17-16-40.png differ
Tech-dat/logic-dat/logic-gate-dat/Buffer-dat/octal-buffer/octal-buffer.md
... ...
@@ -0,0 +1,11 @@
1
+
2
+# octal buffer
3
+
4
+SN74AC573 Octal D-type Transparent Latches with 3-State Outputs
5
+
6
+- SN74AC573
7
+- rise/fall time of about 10ns
8
+
9
+
10
+![](2023-09-28-17-16-40.png)
11
+
Tech-dat/logic-dat/logic-gate-dat/logic-gate-dat.md
... ...
@@ -0,0 +1,28 @@
1
+
2
+# logic gate
3
+
4
+
5
+## 74AHC1G125
6
+
7
+https://www.diodes.com/assets/Datasheets/74AHC1G125.pdf
8
+
9
+| OE | A | Y |
10
+| --- | --- | --- |
11
+| L | H | H |
12
+| L | L | L |
13
+| H | X | Z |
14
+
15
+The output enters a high impedance state when a HIGH-level is applied to the output enable (OE) pin.
16
+
17
+
18
+## NAND
19
+
20
+### NC7SZ00
21
+
22
+
23
+The NC7SZ00 is a single two−input NAND gate from onsemi’s Ultra−High Speed (UHS) series of TinyLogic.
24
+
25
+![](2024-07-08-18-34-43.png)
26
+
27
+
28
+
Tech-dat/logic-dat/logic-gate-dat/logic-inverter-dat/2025-03-25-15-51-07.png
... ...
Binary files /dev/null and b/Tech-dat/logic-dat/logic-gate-dat/logic-inverter-dat/2025-03-25-15-51-07.png differ
Tech-dat/logic-dat/logic-gate-dat/logic-inverter-dat/logic-inverter-dat.md
... ...
@@ -0,0 +1,25 @@
1
+
2
+# inverter-dat
3
+
4
+- 74HC14D
5
+
6
+
7
+
8
+## SN74LVC2G04 Dual Inverter Gate
9
+
10
+![](2025-03-25-15-51-07.png)
11
+
12
+https://www.ti.com/lit/ds/symlink/sn74lvc2g04.pdf
13
+
14
+
15
+Table 1. Function Table (Each Inverter)
16
+
17
+| INPUT (A) | OUTPUT (Y) |
18
+| --------- | ---------- |
19
+| H | L |
20
+| L | H |
21
+
22
+
23
+## ref
24
+
25
+- [[logic-dat]]
... ...
\ No newline at end of file
Tech-dat/logic-dat/logic-gate-dat/shift-register-dat/shift-register-dat.md
... ...
@@ -0,0 +1,11 @@
1
+
2
+# shift-register
3
+
4
+74HC595
5
+
6
+8-BIT SHIFT REGISTER WITH 8-BIT OUTPUT REGISTER
7
+
8
+
9
+74HC165; 74HCT165
10
+
11
+8-bit parallel-in/serial out shift register
... ...
\ No newline at end of file