4de0cc09f6446355da25345608346f50fa1259d7
Board-new-dat/RMP-RPI-CM4-dat/RMP-RPI-CM4-dat.md
... | ... | @@ -4,6 +4,9 @@ I believe the COMPUTE MODULE has enough pins to drive 6 chains. |
4 | 4 | |
5 | 5 | See also: https://github.com/hzeller/rpi-rgb-led-matrix/blob/a3eea997a9254b83ab2de97ae80d83588f696387/wiring.md?plain=1#L144 |
6 | 6 | |
7 | +- https://github.com/hzeller/rpi-rgb-led-matrix/issues/1105 |
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8 | + |
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9 | + |
|
7 | 10 | ## Alternative Hardware Mappings |
8 | 11 | |
9 | 12 | You have relative freedom to assign any pins to the output of your choosing, just add a new mapping in lib/hardware-mapping.c, recompile and it will be provided as a new option in --led-gpio-mapping. |
... | ... | @@ -14,7 +17,7 @@ pin definitions for CM module |
14 | 17 | |
15 | 18 | - https://github.com/hzeller/rpi-rgb-led-matrix/blob/master/lib/hardware-mapping.c |
16 | 19 | |
17 | - |
|
20 | +- [[RMP-RPI-CM4-dat]] |
|
18 | 21 | |
19 | 22 | <summary>Table: GPIO-pins for each hardware mapping</summary> |
20 | 23 |
Chip-dat/broadcom-dat/BCM2711-dat/BCM2711-dat.md
... | ... | @@ -0,0 +1,20 @@ |
1 | + |
|
2 | +# BCM2711-dat |
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3 | + |
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4 | + |
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5 | +https://elinux.org/RPi_BCM2711_GPIOs |
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6 | + |
|
7 | +There are 58 General-Purpose Input/Output (GPIO) lines split into three banks. |
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8 | + |
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9 | +- Bank 0 contains GPIOs 0 to 27, |
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10 | +- bank 1 contains GPIOs 28 to 45, |
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11 | +- and bank 2 contains GPIOs 46 to 57. |
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12 | + |
|
13 | +All GPIO pins have at least two alternative functions within BCM2711. |
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14 | + |
|
15 | +- https://github.com/raspberrypi/linux/blob/rpi-5.4.y/arch/arm/boot/dts/bcm2711.dtsi |
|
16 | + |
|
17 | + |
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18 | + |
|
19 | +- [[bcm2711-peripherals.pdf]] |
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20 | + |
Chip-dat/broadcom-dat/BCM2711-dat/bcm2711-peripherals.pdf
... | ... | Binary files /dev/null and b/Chip-dat/broadcom-dat/BCM2711-dat/bcm2711-peripherals.pdf differ |
Chip-dat/broadcom-dat/BCM2835-dat/BCM2835-dat.md
... | ... | @@ -0,0 +1,4 @@ |
1 | + |
|
2 | +# BCM2835-dat |
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3 | + |
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4 | +https://elinux.org/RPi_BCM2835_GPIOs |
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Chip-dat/broadcom-dat/broadcom-dat.md
... | ... | @@ -0,0 +1,4 @@ |
1 | + |
|
2 | +# broadcom-dat |
|
3 | + |
|
4 | +- [[BCM2711-dat]] |
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... | ... | \ No newline at end of file |
Tech-dat/Network-dat/ethernet-dat/PHY-dat/PHY-dat.md
... | ... | @@ -0,0 +1,52 @@ |
1 | + |
|
2 | +# PHY-dat |
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3 | + |
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4 | + |
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5 | + |
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6 | + |
|
7 | +## PHY (Physical Layer Transceiver) |
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8 | + |
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9 | +In networking, a PHY is a hardware component responsible for the Physical Layer (Layer 1) of the OSI model, which deals with the electrical or optical signal transmission and reception. It's typically used in Ethernet systems to interface between the digital data from a MAC (Media Access Controller) and the physical medium, such as twisted-pair cables or fiber optics. |
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10 | + |
|
11 | +Key roles of a PHY: |
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12 | + |
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13 | +- Signal encoding/decoding: Converts digital data (from the MAC) into signals suitable for transmission over physical media (and vice versa). |
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14 | +- Clock recovery: Extracts clock signals from incoming data streams. |
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15 | +- Auto-negotiation: Determines connection parameters like speed (10/100/1000 Mbps) and duplex mode (full/half). |
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16 | +- Media-dependent interfaces: Provides the electrical interface for the transmission medium, such as copper wires or fiber. |
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17 | + |
|
18 | +The PHY communicates with the MAC through standardized interfaces like RGMII, MII, or GMII. |
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19 | + |
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20 | + |
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21 | + |
|
22 | +## RGMII (Reduced Gigabit Media Independent Interface) |
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23 | + |
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24 | +RGMII is a standard interface used between a MAC and a PHY to support Gigabit Ethernet (1 Gbps) connectivity. It is a more compact and efficient version of GMII, reducing the number of data pins. |
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25 | + |
|
26 | +Features of RGMII: |
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27 | + |
|
28 | +1. Reduced pin count: Uses only 12 data pins (compared to GMII's 24 pins) by transmitting data on both the rising and falling edges of the clock (DDR - Double Data Rate). |
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29 | +2. Speed support: Capable of operating at 10 Mbps, 100 Mbps, and 1 Gbps. |
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30 | +3. Signals in RGMII: |
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31 | +- TX (Transmit) and RX (Receive) data signals |
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32 | +- Clock signals for TX and RX |
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33 | +- Control signals (TX_EN, RX_DV) |
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34 | + |
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35 | +RGMII enables the MAC and PHY to communicate effectively while optimizing space and complexity. |
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36 | + |
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37 | + |
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38 | + |
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39 | + |
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40 | +## MDIO (Management Data Input/Output) |
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41 | + |
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42 | +The MDIO (Management Data Input/Output) interface is a two-wire protocol used for managing and configuring Ethernet PHYs. It allows the MAC (or a host controller) to: |
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43 | + |
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44 | +- Read status registers in the PHY. |
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45 | +- Configure operating modes (e.g., speed, duplex, auto-negotiation settings). |
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46 | + |
|
47 | +MDIO Interface Components: |
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48 | +- MDIO Signal: A bidirectional data line that transfers register addresses and data between the controller and the PHY. |
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49 | +- MDC (Management Data Clock): A clock signal provided by the MAC or host to synchronize MDIO operations. |
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50 | + |
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51 | + |
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52 | +Using the MDIO interface, a host can control multiple PHY devices on the same bus by assigning unique addresses to each PHY. |
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... | ... | \ No newline at end of file |
Tech-dat/SBC-dat/RPI-dat/RPI-CM4-dat/RPI-CM4-dat.md
... | ... | @@ -4,6 +4,10 @@ |
4 | 4 | |
5 | 5 | - [[RPI-dat]] |
6 | 6 | |
7 | +[COMPUTE MODULE OPERATING INSTRUCTIONS](https://www.farnell.com/datasheets/1830506.pdf) |
|
8 | + |
|
9 | + |
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10 | + |
|
7 | 11 | ## CM3 |
8 | 12 | |
9 | 13 | The Raspberry Pi Compute Module is a small, powerful, and customizable single-board computer designed for embedded applications. It is based on the same architecture as the Raspberry Pi boards but in a more compact form factor. The Compute Module provides a more flexible and modular approach compared to the standard Raspberry Pi boards. |
... | ... | @@ -55,9 +59,13 @@ default UARTs: https://forums.raspberrypi.com/viewtopic.php?t=345086 |
55 | 59 | |
56 | 60 | ![](2023-10-27-16-46-54.png) |
57 | 61 | |
62 | + |
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63 | + |
|
58 | 64 | ## hardware |
59 | 65 | |
60 | -- [[EMMC]] - [[WIFI]] |
|
66 | +- [[BCM2711-dat]] |
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67 | + |
|
68 | +- [[EMMC-dat]] - [[WIFI-dat]] - [[PHY-dat]] - [[ethernet-dat]] |
|
61 | 69 | |
62 | 70 | - Connector - 【 DF40HC (3.0)-100DS-0.4V(51)】 |
63 | 71 | |
... | ... | @@ -67,6 +75,10 @@ default UARTs: https://forums.raspberrypi.com/viewtopic.php?t=345086 |
67 | 75 | |
68 | 76 | ![](2024-11-22-19-31-24.png) |
69 | 77 | |
78 | + |
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79 | +- [[RPI-CM4-gpio-dat]] |
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80 | + |
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81 | + |
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70 | 82 | ## Features |
71 | 83 | |
72 | 84 | - on module CPU BCM2711 |
Tech-dat/SBC-dat/RPI-dat/RPI-CM4-dat/RPI-CM4-gpio-dat.md
... | ... | @@ -0,0 +1,38 @@ |
1 | + |
|
2 | +# RPI-CM4-gpio-dat |
|
3 | + |
|
4 | + |
|
5 | +reference extra pins - https://docs.google.com/spreadsheets/d/1m27caMlk2gofswU9ZlBD_y3y81Y_0ARSmmQgm0i1AdQ/edit?gid=0#gid=0 |
|
6 | + |
|
7 | +pin definitions - [[cm4-datasheet.pdf]] - Chapter 4. Pinout |
|
8 | + |
|
9 | + |
|
10 | +| Pin | Signal | Description | |
|
11 | +| --- | ----------------- | ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | |
|
12 | +| 1 | GND | Ground (0V) | |
|
13 | +| 2 | GND | Ground (0V) | |
|
14 | +| 3 | Ethernet_Pair3_P | Ethernet pair 3 positive (connect to transformer or MagJack) | |
|
15 | +| 4 | Ethernet_Pair1_P | Ethernet pair 1 positive (connect to transformer or MagJack) | |
|
16 | +| 5 | Ethernet_Pair3_N | Ethernet pair 3 negative (connect to transformer or MagJack) | |
|
17 | +| 6 | Ethernet_Pair1_N | Ethernet pair 1 negative (connect to transformer or MagJack) | |
|
18 | +| 7 | GND | Ground (0V) | |
|
19 | +| 8 | GND | Ground (0V) | |
|
20 | +| 9 | Ethernet_Pair2_N | Ethernet pair 2 negative (connect to transformer or MagJack) | |
|
21 | +| 10 | Ethernet_Pair0_N | Ethernet pair 0 negative (connect to transformer or MagJack) | |
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22 | +| 11 | Ethernet_Pair2_P | Ethernet pair 2 positive (connect to transformer or MagJack) | |
|
23 | +| 12 | Ethernet_Pair0_P | Ethernet pair 0 positive (connect to transformer or MagJack) | |
|
24 | +| 13 | GND | Ground (0V) | |
|
25 | +| 14 | GND | Ground (0V) | |
|
26 | +| 15 | Ethernet_nLED3 | Active-low Ethernet activity indicator (CM4_3.3V signal): typically a green LED is connected to this pin. IOL = 8mA @ VOL < 0.4V | |
|
27 | +| 16 | Ethernet_SYNC_IN | IEEE1588 SYNC Input pin (CM4_3.3V signal: IOL = 8mA @ VOL < 0.4V) | |
|
28 | +| 17 | Ethernet_nLED2 | Active-low Ethernet speed indicator (`CM4_3.3V`signal): typically a yellow LED is connected to this pin. A low state indicates the 1Gbit or 100Mbit link: IOL = 8mA @ VOL < 0.4V | |
|
29 | +| 18 | Ethernet_SYNC_OUT | IEEE1588 SYNC Output pin (CM4_3.3V signal: IOL = 8mA @ VOL < 0.4V) | |
|
30 | +| 19 | Ethernet_nLED1 | Active-low Ethernet speed indicator (CM4_3.3V signal): typically a yellow LED is connected to this pin. A low state indicates the 1Gbit or 10Mbit link: IOL = 8mA @ VOL < 0.4V | |
|
31 | +| 20 | EEPROM_nWP | Leave floating NB internally pulled up to CM4_3.3V via 100kΩ (VIL < 0.8V), but can be grounded to prevent writing to the on-board EEPROM which stores the bootcode | |
|
32 | +| 21 | Pi_nLED_Activity | Active-low Pi activity LED. 20mA Max, 5V tolerant (VOL < 0.4V). (this is the signal that drives the green LED on the Raspberry Pi 4 Model B) | |
|
33 | +| 22 | GND | Ground (0V) | |
|
34 | +| 23 | GND | Ground (0V) | |
|
35 | +| 24 | GPIO26 | GPIO: typically a 3.3V signal, but can be a 1.8V signal by connecting GPIO_VREF to CM4_1.8V | |
|
36 | +| 25 | GPIO21 | GPIO: typically a 3.3V signal, but can be a 1.8V signal by connecting GPIO_VREF to CM4_1.8V | |
|
37 | +| 26 | GPIO19 | GPIO: typically a 3.3V signal, but can be a 1.8V signal by connecting GPIO_VREF to CM4_1.8V | |
|
38 | +| 27 | GPIO20 | GPIO: typically a 3.3V signal, but can be a 1.8V signal by connecting GPIO_VREF to CM4_1.8V | |
Tech-dat/SBC-dat/RPI-dat/RPI-dat.md
... | ... | @@ -5,6 +5,8 @@ |
5 | 5 | |
6 | 6 | - [[RPI-zero-dat]] |
7 | 7 | |
8 | +- official documentation - https://www.raspberrypi.com/documentation/ |
|
9 | + |
|
8 | 10 | ## hardware |
9 | 11 | |
10 | 12 | - [[rpi-pin-dat]] |