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Chip-cn-dat/SG-micro-dat/SG-micro-dat.md
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# SG-micro-dat
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+
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+
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+- [[SGM4890-dat]] == 1.1 Watt Audio Power Amplifier - [[speaker-dat]]
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+
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+![](2026-04-04-14-25-51.png)
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+
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+![](2026-04-04-14-26-32.png)
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+
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+
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SGM3732YTN6G/TR TSOT-23-6 38V升压LED驱动器IC芯片 - [[SG-micro-dat]]
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-SGM3732 - PWM Dimming, 38V Step-Up LED Drive
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\ No newline at end of file
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+SGM3732 - PWM Dimming, 38V Step-Up LED Drive
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+
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+
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+
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+
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+
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+## ref
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+
Tech-dat/RTC-dat/rtc-dat.md
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@@ -62,6 +62,88 @@ GLOBAL_EN needs to be pulse low for >1mS
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+## unsort chips
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+
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+
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+### ZT-C08803A
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+
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+ZT-C08803A appears to be an RTC chip used in devices that need persistent timekeeping, such as fingerprint attendance terminals and similar embedded products. The note below is a cleaned-up summary and should be verified against the original datasheet.
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+
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+#### Overview
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+
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+- Real-time clock (RTC) for time and calendar keeping
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+- Intended to work with a microcontroller or host processor
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+- Suitable for equipment that needs timestamping or scheduled events
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+
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+#### Likely Functions
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+
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+- Timekeeping: year, month, day, hour, minute, second
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+- Calendar support, possibly including leap-year adjustment
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+- Alarm or timed interrupt output
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+- Low-power operation for battery-backed systems
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+- Serial communication interface, likely I2C or SPI
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+
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+#### Reported Features
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+
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+- Good timing accuracy with an internal or external clock source
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+- Low standby power consumption
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+- Wide operating voltage range
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+- Possible small internal memory area on some variants
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+- Designed for use in electrically noisy environments
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+
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+#### Possible Pins
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+
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+Pin functions are not confirmed and should be checked against the datasheet.
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+
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+- VCC / GND: power and ground
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+- SCL / SDA: I2C clock and data
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+- INT: interrupt or alarm output
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+- X1 / X2: external 32.768 kHz crystal connection
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+- VBAT: backup battery input
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+
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+#### Working Principle
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+
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+- Uses a 32.768 kHz clock source, common for RTC designs
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+- Divides the clock down to 1 Hz for second-based timekeeping
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+- Maintains calendar and time registers internally
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+- Communicates with the host over a serial bus
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+- Can switch to backup power to keep time when the main supply is lost
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+
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+#### Typical Applications
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+
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+- Fingerprint attendance devices
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+- Access control systems
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+- Smart meters
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+- Medical equipment with timestamped records
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+- Industrial controllers and data loggers
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+
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+#### Design Notes
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+
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+- Choose crystal accuracy based on the required clock precision
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+- Size the backup battery for the expected holdover time
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+- Confirm the actual host interface before design-in
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+- Keep the crystal and RTC layout short and quiet on the PCB
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+
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+#### Common Issues
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+
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+- Poor accuracy: often caused by crystal tolerance or temperature drift
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+- Bus communication failure: check pull-up resistors and wiring
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+- Excess backup current: inspect leakage paths in the power design
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+
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+#### Alternatives
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+
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+- DS3231: high-accuracy RTC with temperature compensation
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+- PCF8563: low-power I2C RTC
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+- MCP7940N: battery-backed RTC with SRAM
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+
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+#### Summary
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+
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+ZT-C08803A is best treated as a general-purpose RTC for embedded systems that need basic timekeeping and battery backup. Exact electrical and interface details should be confirmed from a datasheet before using it in a design.
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+
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## ref board
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[[MPC1073-DAT]]
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Tech-dat/amplifier-dat/amplifier-audio-dat/amplifier-audio-dat.md
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## chip and boards
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+- [[SGM4890-dat]] - [[SG-micro-dat]]
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+
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- [[CD7379-dat]]
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- [[AMP1024-dat]] - [[max97220-dat]] - [[ad-audio-dat]] - [[analog-device-dat]] - [[amplifier-audio-dat]]
Tech-dat/memory-dat/RAM-dat/DRAM-dat/2026-04-04-14-33-48.png
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Tech-dat/memory-dat/RAM-dat/DRAM-dat/DRAM-dat.md
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| DRAM | Medium | Low | High | Volatile | Required |
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| SRAM | High | High | Low | Volatile | Not Required |
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| Flash | Low | Medium | High | Non-volatile | Not Required |
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-| EEPROM | Very Low | High | Low | Non-volatile | Not Required |
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+| EEPROM | Very Low | High | Low | Non-volatile | Not Required |
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+
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+
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+
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+## DRAM chip
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+
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+PMS307416A == Synchronous Dynamic RAM == 2048K Words x 16 Bits x 4 Banks (128-MBIT)
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+
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+![](2026-04-04-14-33-48.png)
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+
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+Features
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+- Clock frequency: 166, 133 MHz
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+- Fully synchronous; all signals referenced to a positive clock edge
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+- Four banks operation
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+- Single 3.3V power supply
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+- LVTTL interface
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+- Programmable burst length -- (1, 2, 4, 8, full page)
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+- Programmable burst sequence: Sequential/Interleave
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+- 4096 refresh cycles every 64 ms
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+- Random column address every clock cycle Programmable /CAS latency (2, 3 clocks)
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+- Burst read/write and burst read/single write operations capability
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+- Burst termination by burst stop and precharge command
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+- Byte controlled by LDQM and UDQM
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+- Packages 400-mil 54-pin TSOP-II
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+- Lead-free package
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+
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+https://www.scribd.com/document/744434108/PMS307416A
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+
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+## ref
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+
Tech-dat/tech-dat.md
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- [[serial-dat]] - [[serial-wireless-dat]]
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-- [[memory-dat]] - [[flash-dat]] - [[sd-dat]] - [[eeprom-dat]]
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+- [[memory-dat]] - [[flash-dat]] - [[sd-dat]] - [[eeprom-dat]] - [[DRAM-dat]]
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- [[signal-dat]] - [[analog-dat]] - [[digital-dat]] - [[data-storage-dat]]
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