Chip-cn-dat/BouffaloLab-dat/BouffaloLab-dat.md
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@@ -3,6 +3,8 @@
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- [[BL602-dat]]
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+- [[XT-BL602-DAT]]
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+
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## docs
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- [BL616_BL818](BL616_BL618_DS_1.5_en.pdf) - [[BL616_BL618_DS_1.5_en.pdf]]
Chip-cn-dat/allwinner-dat/allwinner-dat.md
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@@ -36,6 +36,8 @@
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- [[virtualbox-dat]]
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+
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+
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## periperhals
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- [[RTL8723-dat]] - [[realtek-dat]]
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@@ -76,4 +78,6 @@
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- [[chip-cn-dat]]
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79
-- [[sipeed-dat]]
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\ No newline at end of file
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+- [[sipeed-dat]] - [[orange-pi-dat]]
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+
2
+- [[m]]
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\ No newline at end of file
board-3rd-dat/MOD-dat/XT-BL602-DAT/XT-BL602-DAT.md
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@@ -2,4 +2,7 @@
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# XT-BL602-DAT
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-![](35-22-15-15-12-2022.png)
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\ No newline at end of file
0
+![](35-22-15-15-12-2022.png)
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+
2
+
3
+- [[BouffaloLab-dat]]
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\ No newline at end of file
board-3rd-dat/orange-pi-dat/orange-pi-dat.md
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@@ -0,0 +1,4 @@
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+
2
+# orange-pi-dat
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+
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+- [[H618-dat]]
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\ No newline at end of file
board-3rd-dat/sipeed-dat/sipeed-dat.md
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@@ -3,6 +3,7 @@
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- [[K210-dat]]
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+- [[allwinner-dat]]
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## lichee zero
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